Realtek switch SoC docs

cypress register: ISR_PORT_LINK_STS_CHG

Details

Name
ISR_PORT_LINK_STS_CHG
Offset
00a0
Feature
INTERRUPT
Port index range
0 - 51
Portlist index
0
Bit offset
1

Fields

Name LSB Bits Description
ISR_PORT_LINK_STS_CHG 0 1