Realtek switch SoC docs

cypress register: MAC_LINK_SPD_STS

Details

Name
MAC_LINK_SPD_STS
Offset
03a0
Feature
MAC_CONTROL
Port index range
0 - 52
Portlist index
0
Bit offset
2

Fields

Name LSB Bits Description
SPD_STS 0 2

MAC Link Speed Status

  • 0x0: 10M
  • 0x1: 100M
  • 0x2: 1000M
  • 0x3: 500M or 10G (depends on flag of CYPRESS_MAC_LINK_500M_STS)

Ports:

  1. Bits 0 - 1
  2. Bits 2 - 3
  3. Bits 4 - 5
  4. Bits 6 - 7
  5. Bits 8 - 9
  6. Bits 10 - 11
  7. Bits 12 - 13
  8. Bits 14 - 15
  9. Bits 16 - 17
  10. Bits 18 - 19
  11. Bits 20 - 21
  12. Bits 22 - 23
  13. Bits 24 - 25
  14. Bits 26 - 27
  15. Bits 28 - 29
  16. Bits 30 - 31