| MBIST_SW05_DISABLE |
31 |
1 |
|
| MBIST_SW05_BIST_DONE |
30 |
1 |
|
| MBIST_SW05_DRF_BIST_DONE |
29 |
1 |
|
| MBIST_SW05_DRF_BIST_PAUSE |
28 |
1 |
|
| RESERVED |
23 |
5 |
|
| MBIST_SW05_DRF_FAIL_HSB_5 |
22 |
1 |
|
| MBIST_SW05_DRF_FAIL_HSB_4 |
21 |
1 |
|
| MBIST_SW05_DRF_FAIL_HSB_3 |
20 |
1 |
|
| MBIST_SW05_DRF_FAIL_HSB_2 |
19 |
1 |
|
| MBIST_SW05_DRF_FAIL_HSB_1 |
18 |
1 |
|
| MBIST_SW05_DRF_FAIL_HSB_0 |
17 |
1 |
|
| MBIST_SW05_DRF_FAIL_PTR |
16 |
1 |
|
| RESERVED |
7 |
9 |
|
| MBIST_SW05_BIST_FAIL_HSB_5 |
6 |
1 |
|
| MBIST_SW05_BIST_FAIL_HSB_4 |
5 |
1 |
|
| MBIST_SW05_BIST_FAIL_HSB_3 |
4 |
1 |
|
| MBIST_SW05_BIST_FAIL_HSB_2 |
3 |
1 |
|
| MBIST_SW05_BIST_FAIL_HSB_1 |
2 |
1 |
|
| MBIST_SW05_BIST_FAIL_HSB_0 |
1 |
1 |
|
| MBIST_SW05_BIST_FAIL_PTR |
0 |
1 |
|