Realtek switch SoC docs

cypress register: PKTENCAP_PORT_DBG_CTRL

Details

Name
PKTENCAP_PORT_DBG_CTRL
Offset
6af4
Feature
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
Port index range
0 - 52
Portlist index
0
Bit offset
1

Fields

Name LSB Bits Description
PORT_FIFO_OVER_RUN 0 1