cypress register: SOC_CPU_SRAM_CTRL_BIST
Details
- Name
- SOC_CPU_SRAM_CTRL_BIST
- Offset
- 7c24
- Feature
- BIST_BISR
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 31 | 1 |
|
| BIST_DONE | 30 | 1 |
|
| DRF_BIST_DONE | 29 | 1 |
|
| DRF_BIST_PAUSE | 28 | 1 |
|
| RESERVED | 22 | 6 |
|
| DRF_FAIL_5 | 21 | 1 |
|
| DRF_FAIL_4 | 20 | 1 |
|
| DRF_FAIL_3 | 19 | 1 |
|
| DRF_FAIL_2 | 18 | 1 |
|
| DRF_FAIL_1 | 17 | 1 |
|
| DRF_FAIL_0 | 16 | 1 |
|
| RESERVED | 6 | 10 |
|
| BIST_FAIL_5 | 5 | 1 |
|
| BIST_FAIL_4 | 4 | 1 |
|
| BIST_FAIL_3 | 3 | 1 |
|
| BIST_FAIL_2 | 2 | 1 |
|
| BIST_FAIL_1 | 1 | 1 |
|
| BIST_FAIL_0 | 0 | 1 |
|