Realtek switch SoC docs

cypress table: SCHED

Details

Name
SCHED
Feature
SCHEDULING
Type
0
Entries
53
Data width
288
Control register
TBL_ACCESS_CTRL_2
Data register
TBL_ACCESS_DATA_2

Fields

Name LSB Bits Description
LB_APR_Q7 268 20
LB_APR_Q6 248 20
LB_APR_Q5 228 20
LB_APR_Q4 208 20
LB_APR_Q3 188 20
LB_APR_Q2 168 20
LB_APR_Q1 148 20
LB_APR_Q0 128 20
WEIGHT_Q7 118 10
WEIGHT_Q6 108 10
WEIGHT_Q5 98 10
WEIGHT_Q4 88 10
WEIGHT_Q3 78 10
WEIGHT_Q2 68 10
WEIGHT_Q1 58 10
WEIGHT_Q0 48 10
FIX_TKN_Q7 47 1
FIX_TKN_Q6 46 1
FIX_TKN_Q5 45 1
FIX_TKN_Q4 44 1
FIX_TKN_Q3 43 1
FIX_TKN_Q2 42 1
FIX_TKN_Q1 41 1
FIX_TKN_Q0 40 1
EGR_RATE 20 20
SCHED_TYPE 19 1