Realtek switch SoC docs

longan register: I2C_MST1_CTRL1

Details

Name
I2C_MST1_CTRL1
Offset
036c
Feature
INTERFACE

Description

I2C Master controller 1

SMBus compliant transfers on an I2C bus. Using GPIO 8 as SCL and one of GPIO 9-16 can be muxed as SDA 0-7 line.

default: 0x0000_0000

Fields

Name LSB Bits Description
MEM_ADDR 8 24

I2C command byte (reg address?)

The command byte(s) of an SMBus protocol transfer, see https://elixir.bootlin.com/linux/v5.10.81/source/Documentation/i2c/smbus-protocol.rst
RESERVED 7 1
SDA_OUT_SEL 4 3

Select pin to serve as I2C master 1 serial data output

Note, there is not a ‘disabled’ pin, one output is always active. To fully disable, we need to disconnect the controller from the bus by setting the pin back to GPIO.

  • 0x0 SDA0 (GPIO09)
  • 0x1 SDA1 (GPIO10)
  • 0x2 SDA2 (GPIO11)
  • 0x3 SDA3 (GPIO12)
  • 0x4 SDA4 (GPIO13)
  • 0x5 SDA5 (GPIO14)
  • 0x6 SDA6 (GPIO15)
  • 0x7 SDA7 (GPIO16)
GPIO8_SCL_SEL 3 1

Pinctroller for I2C master 1 serial clock out

  • 0b0: GPIO8
  • 0b1: SCL
RWOP 2 1

I2C Read/Write operator

  • 0b0: read
  • 0b1: write
I2C_FAIL 1 1

I2C command fail indicator

Note, this bit is automatically reset on each new i2c command trigger

  • 0b0: noop
  • 0b1: fail
I2C_TRIG 0 1

I2C command trigger

This bit will self-clear on execution

  • 0b0: noop
  • 0b1: execute