longan register: I2C_MST1_DATA_WORD0
Details
- Name
- I2C_MST1_DATA_WORD0
- Offset
- 0374
- Feature
- INTERFACE
Description
Data to be written or read in an SMBus transfer. First byte to send goes into lowest 8 bits, 4th byte to send in the highest 8 bits. Data read is stored by the SoC in the same order in the WORD 0-3 registers.
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| DATA3 | 24 | 8 |
|
| DATA2 | 16 | 8 |
|
| DATA1 | 8 | 8 |
|
| DATA0 | 0 | 8 |
|