longan register: I2C_MST2_CTRL1
Details
- Name
- I2C_MST2_CTRL1
- Offset
- 0388
- Feature
- INTERFACE
Description
Control register of Master 2 for SMBus compliant transfers on an I2C bus. Master 2 uses GPIO 17 as SCL and one of GPIO 9-16 as SDA line. The SDA lines are shared with Master 1.
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| MEM_ADDR | 8 | 24 |
|
| RESERVED | 7 | 1 |
|
| SDA_OUT_SEL | 4 | 3 |
|
| GPIO17_SCL_SEL | 3 | 1 |
Select GPIO 17 as SCL. |
| RWOP | 2 | 1 |
|
| I2C_FAIL | 1 | 1 |
Result of an executed SMBus transfer. |
| I2C_TRIG | 0 | 1 |
|