longan register: I2C_MST_GLB_CTRL
Details
- Name
- I2C_MST_GLB_CTRL
- Offset
- 0384
- Feature
- INTERFACE
Description
I2C master 1 and 2 pin and timing controller
default: 0x0000_0000
Fields
Name | LSB | Bits | Description |
---|---|---|---|
CFG_SCL_I_DLY_2 | 28 | 4 |
I2C master 2 input clock delay Note, for 24FE + 4G modes, 1T is 6.53 ns, all other modes, 1T is 2.45 ns.
|
CFG_SCL_I_DLY_1 | 24 | 4 |
I2C master 1 input clock delay Note, for 24FE + 4G modes, 1T is 6.53 ns, all other modes, 1T is 2.45 ns.
|
CFG_WAIT_SCL_MODE_2 | 22 | 2 |
I2C master 2 clock wait time
|
CFG_WAIT_SCL_MODE_1 | 20 | 2 |
I2C master 1 clock wait time
|
CFG_DATA_HOLD_TIME_2 | 19 | 1 |
I2C master 2 data hold time
|
CFG_DATA_HOLD_TIME_1 | 18 | 1 |
I2C master 1 data hold time
|
I2C_OPEN_DRN_SCL_MST2 | 17 | 1 |
Open Drain selector for master 2 SCL
|
I2C_OPEN_DRN_SCL_MST1 | 16 | 1 |
Open Drain selector for master 1 SCL
|
I2C_OPEN_DRN_SDA_7_0 | 8 | 8 |
Open Drain selector One bit per SDA line
|
GPIO16_SDA7_SEL | 7 | 1 |
Pinctroller output selection
|
GPIO15_SDA6_SEL | 6 | 1 |
Pinctroller output selection
|
GPIO14_SDA5_SEL | 5 | 1 |
Pinctroller output selection
|
GPIO13_SDA4_SEL | 4 | 1 |
Pinctroller output selection
|
GPIO12_SDA3_SEL | 3 | 1 |
Pinctroller output selection
|
GPIO11_SDA2_SEL | 2 | 1 |
Pinctroller output selection
|
GPIO10_SDA1_SEL | 1 | 1 |
Pinctroller output selection
|
GPIO9_SDA0_SEL | 0 | 1 |
Pinctroller output selection
|