longan register: PLL_GLB_CTRL0
Details
- Name
- PLL_GLB_CTRL0
- Offset
- e200
- Feature
- PLL_BIAS
Fields
| Name |
LSB |
Bits |
Description |
| RESERVED |
31 |
1 |
|
| PLL_DBG_OUT |
20 |
11 |
|
| CPU_CLK_SEL |
19 |
1 |
|
| NOR_CLK_SEL |
18 |
1 |
|
| LXB_CLK_SEL |
17 |
1 |
|
| SW_PLL_READY |
16 |
1 |
|
| CPU_PLL_READY |
15 |
1 |
|
| REG_125M_PLL_READY |
14 |
1 |
|
| BYPASS_ALE_PLL |
13 |
1 |
|
| BYPASS_NOR_PLL |
12 |
1 |
|
| BYPASS_LXB_PLL |
11 |
1 |
|
| BYPASS_CPU_PLL |
10 |
1 |
|
| BYPASS_125M_PLL |
9 |
1 |
|
| BYPASS_SRAM_PLL |
8 |
1 |
|
| EN_DDR_PLL |
7 |
1 |
|
| EN_NOR_PLL |
6 |
1 |
|
| EN_NAND_PLL |
5 |
1 |
|
| EN_USB_PLL |
4 |
1 |
|
| EN_LXB_PLL |
3 |
1 |
|
| EN_CPU_PLL |
2 |
1 |
|
| EN_125M_PLL |
1 |
1 |
|
| EN_SRAM_PLL |
0 |
1 |
|