longan register: SDS_INTF_CTRL0
Details
- Name
- SDS_INTF_CTRL0
- Offset
- 019c
- Feature
- PHY_SERDES
- Port index range
- 0 - 3
- Portlist index
- 0
- Bit offset
- 32
Fields
| Name |
LSB |
Bits |
Description |
| RESERVED |
25 |
7 |
|
| LINK_OK_TGXR_S0 |
24 |
1 |
|
| SDS_SDET_OUT_S0 |
23 |
1 |
|
| FIB100_DET_S0 |
22 |
1 |
|
| FIB100_SDET_S0 |
21 |
1 |
|
| FIB_ISO_S0 |
20 |
1 |
|
| RX_SYM_ERR_ALL_S0 |
19 |
1 |
|
| RX_SYM_ERR_TGXR_S0 |
18 |
1 |
|
| INTP_TGX_S0 |
17 |
1 |
|
| INTP_TGR_S0 |
16 |
1 |
|
| RESERVED |
10 |
6 |
|
| ISO_ON_S0 |
9 |
1 |
|
| LOAD_SYS_PAR_S0 |
8 |
1 |
|
| UNIDIR_TX_ABLE_S0 |
7 |
1 |
|
| SDS_TX_DISABLE_S0 |
6 |
1 |
|
| SDS_RX_DISABLE_S0 |
5 |
1 |
|
| BCST_ON_S0 |
4 |
1 |
|
| INTP_SRC_TGX_S0 |
3 |
1 |
|
| INTP_SRC_TGR_S0 |
2 |
1 |
|
| TX_SWAP_TGX_S0 |
1 |
1 |
|
| RX_SWAP_TGX_S0 |
0 |
1 |
|