longan register: SDS_INTF_CTRL1
Details
- Name
- SDS_INTF_CTRL1
- Offset
- 02a8
- Feature
- PHY_SERDES
- Port index range
- 4 - 9
- Portlist index
- 0
- Bit offset
- 32
Fields
| Name |
LSB |
Bits |
Description |
| RESERVED |
25 |
7 |
|
| LINK_OK_TGXR_S4 |
24 |
1 |
|
| SDS_SDET_OUT_S4 |
23 |
1 |
|
| FIB100_DET_S4 |
22 |
1 |
|
| FIB100_SDET_S4 |
21 |
1 |
|
| FIB_ISO_S4 |
20 |
1 |
|
| RX_SYM_ERR_ALL_S4 |
19 |
1 |
|
| RX_SYM_ERR_TGXR_S4 |
18 |
1 |
|
| INTP_TGX_S4 |
17 |
1 |
|
| INTP_TGR_S4 |
16 |
1 |
|
| RESERVED |
10 |
6 |
|
| ISO_ON_S4 |
9 |
1 |
|
| LOAD_SYS_PAR_S4 |
8 |
1 |
|
| UNIDIR_TX_ABLE_S4 |
7 |
1 |
|
| SDS_TX_DISABLE_S4 |
6 |
1 |
|
| SDS_RX_DISABLE_S4 |
5 |
1 |
|
| BCST_ON_S4 |
4 |
1 |
|
| INTP_SRC_TGX_S4 |
3 |
1 |
|
| INTP_SRC_TGR_S4 |
2 |
1 |
|
| TX_SWAP_TGX_S4 |
1 |
1 |
|
| RX_SWAP_TGX_S4 |
0 |
1 |
|