longan register: SPI_CTRL2
Details
- Name
- SPI_CTRL2
- Offset
- 03a4
- Feature
- INTERFACE
Description
SPI Controller register (2)
default: 0x0000_0000
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 17 | 15 |
|
| SPI_RX_DLY | 14 | 3 |
SPI receive delay control Note, systemclock can be 408.33MHz or 153.125MHz
|
| SPI_CLK_DLY | 11 | 3 |
SPI clock delay control Note, systemclock can be 408.33MHz or 153.125MHz
|
| SPI_TX_DLY | 8 | 3 |
SPI transmit delay control Note, systemclock can be 408.33MHz or 153.125MHz
|
| SPI_CPHA | 7 | 1 |
Clock phase control
|
| SPI_CPOL | 6 | 1 |
Clock polarity control
|
| SPI_TSLCH | 3 | 3 |
SPI chip select setup time delay (n + 1) * 1/2 * SPI clock |
| SPI_TCHSH | 0 | 3 |
SPI chip select active hold time (n + 1) * 1/2 * SPI clock |