longan table: L3_HOST_ROUTE_IPUC
Details
- Name
- L3_HOST_ROUTE_IPUC
- Feature
- LAYER_3_ROUTING
- Type
- 1
- Entries
- 6144
- Data width
- 160
- Control register
- TBL_ACCESS_CTRL_1
- Data register
- TBL_ACCESS_DATA_1
Description
Main table for L3 host-based routing (link-local routes).
This table is actually organized as two tables with different hash algorithms similarly to the 2 hash algorithms used for the L2 lookup tables on the RTL9300 architecture. There are 512 hash entries (table height, buckets) per table and 6 entries per bucket (slots). In total this makes 2 * 512 * 6 = 6144 entries. To find an entry, the driver needs to try out both tables, use the appropriate hash as index into the table and loop over all slots in the bucket.
Note that the 7th and 8th entries do not exist.
The address in the table is table << 12 | hash << 3 | slot, from which the index is calulated as (addr >> 3) * 6 + (addr % 8). I.e:
Addr 5 -> index 5, 6 -> 6, 7 -> 7, 8 -> 6, 9 -> 7
That means slots 6 and 7 contain entries with addresses from hash values that would put them in both 6, 7 as well as 8 and 9.
Different types of entries in this table take up different numbers of slots in the table. For IPUC the width is 1, for IPMC 2, for IP6UC 3, IP6MC 6.
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| VALID | 159 | 1 |
|
| ENTRY_TYPE | 157 | 2 |
|
| HIT | 148 | 1 |
This bit is set by the HW when the route has been used to forward a packet. The use-case is to age out routes that are unused. |
| DST_NULL_INTF | 147 | 1 |
|
| ACTION | 145 | 2 |
0: FORWARD, 1: TRAP2CPU, 2:COPY2CPU, 3: DROP |
| NH_IDX | 134 | 11 |
An index into the L3_NEXTHOP table. |
| TTL_DEC | 133 | 1 |
|
| TTL_CHK | 132 | 1 |
|
| QOS_AS | 131 | 1 |
|
| QOS_PRI | 128 | 3 |
|
| IP | 0 | 32 |
|