Realtek switch SoC docs

mango register: SERDES_MODE_CTRL

Details

Name
SERDES_MODE_CTRL
Offset
13cc
Feature
PHY_SERDES
Array index range
0 - 13
Portlist index
0
Bit offset
8

Description

SerDes Interface mode controller

Fields

Name LSB Bits Description
SERDES_IF 0 8

Serdes Interface Mode Selection

bits 4:0 Forced speed serdes selection

Note, only works when bit 7 = 1

  • 0x00: Reserved
  • 0x01: Reserved
  • 0x02: SGMII (1.25G)
  • 0x03: Reserved
  • 0x04: 1000Base-X (1.25G)
  • 0x05: 100Base-FX (125M)
  • 0x06: QSGMII (5G) [FEC]
  • 0x07: 1000Base-X/100Base-FX auto detection
  • 0x08: Reserved
  • 0x09: XSMII (2.5G)
  • 0x0a: Reserved
  • 0x0b: Reserved
  • 0x0c: Reserved
  • 0x0d: USXGMII (10.3215G) [FEC]
  • 0x0e: Reserved
  • 0x0f: Reserved
  • 0x10: XSGMII (10.3125G)
  • 0x11: QHSGMII (10.315G)
  • 0x12: HISGMII (3.125G)
  • 0x13: Reserved
  • 0x14: Dual-HISGMII (6.25G)
  • 0x15: Reserved
  • 0x16: 2500Base-X (3.125G)
  • 0x17: R-XAUI lite (6.25G)
  • 0x18: Reserved
  • 0x19: Reserved
  • 0x1a: 10Gbase-R (10.3125G) [FEC|SV]
  • 0x1b: 10GBase-R/SGMII auto detection
  • 0x1c: 10Gbase-R/100Base-X auto detection
  • 0x1d: Reserved
  • 0x1e: Reserved
  • 0x1f: SerDeS Off

bit 5 Forward Error Correction (FEC)

Only modes with [FEC] listed support FEC

  • 0b0: disable
  • 0b1: enable

bit 6 10Gbase-R Speed Boost

Only modes with [SB] listed support Speed Boost

  • 0b0: 10.3125G
  • 0b1: 10.9375G

bit 7 Force SerDeS setup

  • 0b0: disable
  • 0b1: enable