mango register: SPI_CTRL0
Details
- Name
- SPI_CTRL0
- Offset
- 103c
- Feature
- INTERFACE
Description
SPI Controller register (0) default: 0x0006_8024
Fields
Name | LSB | Bits | Description |
---|---|---|---|
RESERVED | 26 | 6 |
|
DATA_WIDTH | 17 | 9 |
SPI Command read/write data width Note, val + 1, e.g. 0x000 = 1 byte, max is 512 bytes. |
ADDR_WIDTH | 14 | 3 |
External SPI slave address width
|
SPI_CLK_SEL | 11 | 3 |
SPI Clock divider clock = 250 MHz / div
|
GPIO_SPI_SEL | 10 | 1 |
GPIO SPI Select
|
GPIO12_CSB1_SEL | 9 | 1 |
GPIO12 Chip select choice
|
GPIO11_CSB0_SEL | 8 | 1 |
GPIO11 Chip select choice
|
SPI_CPHA | 7 | 1 |
Clock phase control
|
SPI_CPOL | 6 | 1 |
Clock polarity control
|
SPI_TSLCH | 3 | 3 |
SPI chip select setup time delay (n + 1) * (250 MHz / 4) |
SPI_TCHSH | 0 | 3 |
SPI chip select active hold time (n + 1) * (250 MHz / 4) |