Realtek switch SoC docs

maple CPU tags

Frame direction: RX

Name LSB Bits Description
RSVD 0 16
CPUTAGIF 16 8
QID 24 3
SPN 27 5

Switch source port the packet originated from

MIR_HIT 32 4
ACL_HIT 36 1

An ACL rule triggered on this frame

ACL_IDX 37 11

If HIT_ACL is set, gives the index of the IACL rule

RSVD 48 2
OTAGIF 50 1

Outer (or ‘service’) VLAN tag present

ITAGIF 51 1

Inner (or ‘customer’) VLAN tag present

RVID 52 12
RSVD 64 1
MAC_CST 65 1
ATK_HIT 66 1

Attack prevention triggered on this frame

ATK_TYPE 67 5

If ATK_HIT is set, indicates the detected attack type.

NEW_SA 72 1

New source MAC address

L2_PMV 73 1

L2 entry port moving

RSVD 74 2
REASON 76 4

Reason the packet was forwarded to the CPU

  • 0: reason not set (DUMMY)
  • 1: RLDP or RLPP packet (REASON_RLDP_RLPP)
  • 2: RMA
  • 3: VLAN ingress filter (IRG_VLAN_FILTER)
  • 4: Inner/Outer tag CFI/DEI = 1 (INNER_OUTTER_CFI)
  • 5: CPU MAC (MY_MAC)
  • 6: Special trap. IGMP/MLD/EAPOL (SPECIAL_TRAP)
  • 7: Special copy. ARP/IPv6 neighbor discovery (SPECIAL_COPY)
  • 8: Routing exception. IPv4 header error, IPv4 TTL exceeded, IPv4 options, IPv6 hop limit exceeded, IPv6 hop-by-hop option, or IPv6 next-hop entry age out (ROUTING_EXCEPTION)
  • 9: Unknown unicast or multicast (UNKWN_UCST_MCST)
  • 10: MAC constraint (learn limit) system-based (MAC_CONSTRAINT_SYS | MAC_CONSTRAINT)
  • 11: MAC constraint (learn limit) VLAN-based (MAC_CONSTRAINT_VLAN | MAC_CONSTRAINT)
  • 12: MAC constraint (learn limit) port-based (MAC_CONSTRAINT_PORT | MAC_CONSTRAINT)
  • 13: CRC error (CRC_ERROR)
  • 14: IPv6 unknown extension header (IP6_UNKWN_EXT_HDR)
  • 15: Normal forwaring, i.e. flooding or L2 entry hit (NORMAL_FWD)
RSV0 80 8
RSV1 88 8

Frame direction: TX

A 12-byte header to control flow of outgoing frames.

Bit 0 corresponds to the MSB of the first byte, bit 7 to the LSB of the first byte, bit 8 to the MSB of the second byte, etc.

Name LSB Bits Description
RSVD 0 16
CPUTAGIF 16 8

Always set to 0x4 (“PROTO ID”)

RSVD 24 2
BP_FLTR1 26 1

When set, bypass the following filtering:

  • egress OAM mux
  • egress port isolation
  • egress mirror isolation
  • WRED
BP_FLTR2 27 1

When set, bypass the following checks or filters:

  • egress spanning-tree port state in blocking/listening or learning
  • egress VLAN filtering
AS_TAGSTS 28 1

From SDK: “Decide whether proceed outer/inner tag by ALE”

ACL_ACT 29 1
RVID_SEL 30 1

Relay VLAN-ID selection.

  • 0: Use the inner tag
  • 1: Use the outer tag
L2LEARNING 31 1
AS_PRI 32 1

Set to assign the priority indicated by PRI.

PRI 33 3
RSVD 36 2
AS_DPM 38 1

When cleared, “ALE type forwarding” is used.

When set, the DPM is applied as specified by DPM_TYPE.

DPM_TYPE 39 1
  • 0: DPM is interpreted as “LOGICAL” ports.
  • 1: DPM is interpreted as “PHYSICAL” ports.

Note: ‘Logical’ ports appear to be related to port trunking/link aggregation, although newer SoCs also have a specific DPM type “TRUNK” in the Realtek SDK. The open driver currently hard codes this flag to be cleared.

RSV0 40 8
RSV1 48 8
RSV2 56 8
RSVD 64 3
DPM 67 29

Destination port mask.