ADDRESS_LEARNING_FLUSH |
1 |
0 |
ADDRESS_TABLE_LOOKUP |
19 |
0 |
ATTACK_PREVENTION |
11 |
0 |
BANDWIDTH_CONTROL_INGRESS_EGRESS |
9 |
0 |
BIST_BISR |
23 |
0 |
CHP_INFORMATION |
3 |
0 |
CODE_PROTECTION |
2 |
0 |
CONGESTION_AVOIDANCE |
10 |
0 |
ETHERNET_AV |
10 |
0 |
FLOWCONTROL_BACKPRESSURE_THRESHOLD |
41 |
0 |
HSM |
51 |
0 |
HW_MISC |
35 |
0 |
IEEE802_1Q_VLAN |
27 |
0 |
INGRESS_AND_EGRESS_ACL |
11 |
0 |
INGRESS_PRIORITY_DECISION |
14 |
0 |
INTERFACE |
16 |
0 |
INTERRUPT |
39 |
0 |
L3_ROUTING |
1 |
0 |
LED |
35 |
0 |
LINK_AGGREGATION |
5 |
0 |
MAC_CONTROL |
66 |
0 |
METER_MARKER |
12 |
0 |
MIRRORING |
15 |
0 |
MISC |
24 |
0 |
MODIFIER_HSA |
9 |
0 |
NIC_DMA |
15 |
0 |
PARSER |
4 |
0 |
PARSER_HSB |
23 |
0 |
PHY_SERDES |
1152 |
0 |
PLL_BIAS |
16 |
0 |
PORT_ISOLATION_FORWARDING_FORCE_MODE |
4 |
0 |
POWER_SAVING |
38 |
0 |
PTP_PRECISION_TIME_PROTOCOL |
176 |
0 |
QUEUE_MANAGEMENT |
7 |
0 |
RANGE_CHECK_PORT_VLAN_IP_L4PORT |
4 |
0 |
REMARKING |
10 |
0 |
RESET |
6 |
0 |
RLDP_RLPP |
1 |
0 |
RMA |
16 |
0 |
RRCP |
2 |
0 |
RTCT |
8 |
0 |
SCHEDULING |
9 |
0 |
SMART_PACKET_GENERATOR |
19 |
0 |
SPECIAL_TRAP |
8 |
0 |
STATISTIC_COUNTERS |
44 |
0 |
STORM_CONTROL_B_M_UM_DLF |
11 |
0 |
TABLE_ACCESS |
9 |
18 |
TEST_MODE |
5 |
0 |