maple register: ACL_BLK_PWR_CTRL
Details
- Name
- ACL_BLK_PWR_CTRL
- Offset
- 6104
- Feature
- INGRESS_AND_EGRESS_ACL
- Array index range
- 0 - 11
- Portlist index
- 0
- Bit offset
- 1
Description
Enable or disable power on a Packet Inspection Engine rule Block
The SoC has 12 packet inspection engine (PIE) blocks with 128 rule entries each. The rules are stored in the IACL table with consequently 1536 entries.
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| PWR_EN | 0 | 1 |
|