maple register: ACL_TMPLTE_CTRL
Details
- Name
- ACL_TMPLTE_CTRL
- Offset
- 6138
- Feature
- INGRESS_AND_EGRESS_ACL
- Port index range
- 5 - 7
- Array index range
- 0 - 11
- Portlist index
- 0
- Bit offset
- 6
Description
Configuration of user-definable templates for the PIE
The RTL838X SoCs use 5 fixed templates with definitions for which data fields are to be copied from the Ethernet Frame header into the 12 User-definable fields of the Packet Inspection Engine’s buffer. 3 user-definable templates can be set up via the definitions in the RTL838X_ACL_TMPLTE_CTRL control registers by setting the field-IDs for each of the 12 fields.
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| TMPLTE_FIELD | 0 | 6 |
|