maple register: EXT_PHY_0_3_CTRL
Details
- Name
- EXT_PHY_0_3_CTRL
- Offset
- 0010
- Feature
- INTERFACE
Fields
Name |
LSB |
Bits |
Description |
RESERVED |
24 |
8 |
|
P3_SEL_COL_FROM_CRS |
23 |
1 |
|
P3_SEL_NEGR |
22 |
1 |
|
P3_SEL_NEGT |
21 |
1 |
|
P3_SEL_ORG_CRS |
20 |
1 |
|
P3_SEL_RX_SYNC |
19 |
1 |
|
P3_SEL_TX_SYNC |
18 |
1 |
|
P2_SEL_COL_FROM_CRS |
17 |
1 |
|
P2_SEL_NEGR |
16 |
1 |
|
P2_SEL_NEGT |
15 |
1 |
|
P2_SEL_ORG_CRS |
14 |
1 |
|
P2_SEL_RX_SYNC |
13 |
1 |
|
P2_SEL_TX_SYNC |
12 |
1 |
|
P1_SEL_COL_FROM_CRS |
11 |
1 |
|
P1_SEL_NEGR |
10 |
1 |
|
P1_SEL_NEGT |
9 |
1 |
|
P1_SEL_ORG_CRS |
8 |
1 |
|
P1_SEL_RX_SYNC |
7 |
1 |
|
P1_SEL_TX_SYNC |
6 |
1 |
|
P0_SEL_COL_FROM_CRS |
5 |
1 |
|
P0_SEL_NEGR |
4 |
1 |
|
P0_SEL_NEGT |
3 |
1 |
|
P0_SEL_ORG_CRS |
2 |
1 |
|
P0_SEL_RX_SYNC |
1 |
1 |
|
P0_SEL_TX_SYNC |
0 |
1 |
|