maple register: GMII_INTF_SEL
Details
- Name
- GMII_INTF_SEL
- Offset
- 1000
- Feature
- INTERFACE
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 5 | 27 |
|
| UART1_SEL | 4 | 1 |
Set to mux UART1 on package pins 116 and 117. Clear to mux the SPI slave peripheral. |
| JTAG_SEL | 2 | 2 |
Mux eJTAG pins:
|
| GMII_IF_SEL | 0 | 2 |
|