Realtek switch SoC docs

maple register: LED_GLB_CTRL

Details

Name
LED_GLB_CTRL
Offset
a000
Feature
LED

Description

Miscellaneous I/O control bits.

Fields

Name LSB Bits Description
RESERVED 31 1
BLINK_TIME_SEL_2 30 1
ASIC_CFG_8231 29 1

Read-only bit. Possibly some sort of indicator or RTL8231 support. Bit is cleared when the LED mode is set to ‘single color scan’ or ‘bi-color scan’ in LED_MODE_SEL.

BUZZER_CMD 28 1
BUZZER_FREQ_SEL 25 3
BUZZER_SEL 24 1
BLINK_TIME_SEL 22 2
EXT_8231_GPIO_EN_2_0 19 3
LED_LOAD_EN 18 1
SYS_LED_MODE 16 2

System LED mode.

  • 0: off
  • 1: blink rate 64ms
  • 2: blink rate 1024ms
  • 3: on
SYS_LED_EN 15 1

Enables system LED peripheral, and muxes GPIO A0. Set to 1 to enable and mux to A0 as output, or 0 to disable and use A0 as GPIO.

STEP2_PWR_ON_LED_2_0 12 3
STEP1_PWR_ON_LED_2_0 9 3
COMBO_PORT_MODE 7 2

When set to zero (default), no combo ports are present, and every port number has exactly one (set of) LEDs on the device. When set to a non-zero value, the peripheral will output the same number of extra LED positions at the end of the LED string (i.e. indices 28-31, not controllable) as are enabled in the indicated port range.

Must be set to 1 when there are combo ports for port numbers 20-23, or set to 2 when there are combo ports for port numbers 24-27.

For example, when ports 24 and 25 are combo ports, with individual LED sets for both the RJ45 connectors and SFP cages, this field must be set to ‘2’. The peripheral will then output values for all enabled LEDs, plus 2 times the number of LEDs per port for the SFP cages.

LED_MDC_DUTY_SEL 6 1
P27_24_LED_MASK_SEL 3 3

High port LED mask. Activate an LED output for ports 24-27 by setting the respective bit. Should have the same value as the low-port configuration, even if the ports aren’t used.

LED_MASK_SEL_2_0 0 3

Low port LED mask. Activate an LED output for ports 0-23 by setting the respective bit. LEDs must be activated from LSB to MSB.

  • 0x0: no LEDs
  • 0x1: one LED
  • 0x3: two active LEDs
  • 0x7: three active LEDs.