maple register: PLL_CPU_MISC_CTRL
Details
- Name
- PLL_CPU_MISC_CTRL
- Offset
- 0fcc
- Feature
- PLL_BIAS
Fields
| Name |
LSB |
Bits |
Description |
| CPU_CMU_SSC_ORDER |
31 |
1 |
|
| CPU_CMU_TIME2_RST_WIDTH |
29 |
2 |
|
| CPU_CMU_TIME0_CK |
26 |
3 |
|
| CPU_CMU_CLKRDY |
24 |
2 |
|
| CPU_CMU_BIG_KVCO |
23 |
1 |
|
| CPU_CMU_LPF_RS |
20 |
3 |
|
| CPU_CMU_EN_CENTER_IN |
19 |
1 |
|
| CPU_CMU_EN_WD |
18 |
1 |
|
| RESERVED |
17 |
1 |
|
| CPU_CMU_PI_I_SEL |
14 |
3 |
|
| CPU_CMU_SEL_CP_I |
10 |
4 |
|
| CPU_CMU_SEL_CCO |
9 |
1 |
|
| CPU_CMU_LDO_SEL |
6 |
3 |
|
| CPU_CMU_LPF_CP |
5 |
1 |
|
| CPU_CMU_CP_NEW_EN |
4 |
1 |
|
| CPU_CMU_LDO_EN |
3 |
1 |
|
| CPU_CMU_VC_DLY |
2 |
1 |
|
| CPU_CMU_EN_CKOOBS |
1 |
1 |
|
| CPU_TEST_EN |
0 |
1 |
|