maple register: PLL_SW_MISC_CTRL
Details
- Name
- PLL_SW_MISC_CTRL
- Offset
- 0ff0
- Feature
- PLL_BIAS
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| SW_CMU_SSC_ORDER | 31 | 1 |
|
| SW_CMU_TIME2_RST_WIDTH | 29 | 2 |
|
| SW_CMU_TIME0_CK | 26 | 3 |
|
| SW_CMU_CLKRDY | 24 | 2 |
|
| SW_CMU_BIG_KVCO | 23 | 1 |
|
| SW_CMU_LPF_RS | 20 | 3 |
|
| SW_CMU_EN_CENTER_IN | 19 | 1 |
|
| SW_CMU_EN_WD | 18 | 1 |
|
| RESERVED | 17 | 1 |
|
| SW_CMU_PI_I_SEL | 14 | 3 |
|
| SW_CMU_SEL_CP_I | 10 | 4 |
|
| SW_CMU_SEL_CCO | 9 | 1 |
|
| SW_CMU_LDO_SEL | 6 | 3 |
|
| SW_CMU_LPF_CP | 5 | 1 |
|
| SW_CMU_CP_NEW_EN | 4 | 1 |
|
| SW_CMU_LDO_EN | 3 | 1 |
|
| SW_CMU_VC_DLY | 2 | 1 |
|
| SW_CMU_EN_CKOOBS | 1 | 1 |
|
| SW_TEST_EN | 0 | 1 |
|