maple register: PRI_SEL_TBL_CTRL
Details
- Name
- PRI_SEL_TBL_CTRL
- Offset
- 5fd8
- Feature
- INGRESS_PRIORITY_DECISION
- Array index range
- 0 - 3
- Portlist index
- 0
- Bit offset
- 32
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 19 | 13 |
|
| OTAG_WT | 16 | 3 |
|
| RESERVED | 15 | 1 |
|
| ITAG_WT | 12 | 3 |
|
| RESERVED | 11 | 1 |
|
| DSCP_WT | 8 | 3 |
|
| RESERVED | 6 | 2 |
|
| PORT_OTAG_WT | 3 | 3 |
|
| PORT_WT | 0 | 3 |
|