maple register: SCHED_LB_CTRL
Details
- Name
- SCHED_LB_CTRL
- Offset
- c004
- Feature
- SCHEDULING
- Port index range
- 0 - 28
- Portlist index
- 0
- Bit offset
- 32
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 9 | 23 |
|
| P_EGR_LB_EN | 8 | 1 |
|
| Q7_EGR_LB_APR_EN | 7 | 1 |
|
| Q6_EGR_LB_APR_EN | 6 | 1 |
|
| Q5_EGR_LB_APR_EN | 5 | 1 |
|
| Q4_EGR_LB_APR_EN | 4 | 1 |
|
| Q3_EGR_LB_APR_EN | 3 | 1 |
|
| Q2_EGR_LB_APR_EN | 2 | 1 |
|
| Q1_EGR_LB_APR_EN | 1 | 1 |
|
| Q0_EGR_LB_APR_EN | 0 | 1 |
|