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dgs-1210-16 [2020/09/29 16:56] – created bkoblitz | dgs-1210-16 [2022/04/25 15:55] (current) – Tag with JTAG svanheule | ||
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- | ====== D-Link DGS-1210-10P (rev G) ====== | + | ====== D-Link DGS-1210-16 (rev G) ====== |
{{wiki: | {{wiki: | ||
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===== Hardware ===== | ===== Hardware ===== | ||
- | 4 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules. They can be used alternatively to the 4 GBit Ethernet uplink ports. The respective Ethernet and SFP uplink port cannot be used at the same time. It has an [[RTL8382M]] SoC with 8 built-in PHYs, and a [[RTL8231]] GPIO extender to control the port LEDs, power LED, and a reset button (software controlled). | + | * [[rtl838x|RTL8382M]] SoC |
- | The RTL 8382M SoC has 128MB external RAM (Nanya). There is 32MB Flash memory (U7). | + | * Macronix MX25L25635F (32MB flash) |
+ | * Nanya 128MB RAM | ||
+ | * [[rtl8231|RTL8231]] GPIO extender to control the port LEDs, power LED, and a reset button (software controlled) | ||
+ | |||
+ | 4 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules. They can be used alternatively to the 4 GBit Ethernet uplink ports. The respective Ethernet and SFP uplink port cannot be used at the same time. | ||
+ | |||
+ | Power is supplied via a 230V AC connector. | ||
A Serial header is found at J6. Pins are Vcc(3.3V, Square), TX, RX and GND. Serial connection is via 115200 baud, 8N1. | A Serial header is found at J6. Pins are Vcc(3.3V, Square), TX, RX and GND. Serial connection is via 115200 baud, 8N1. | ||
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The board identifies as RTL8382M_8218B_INTPHY_8214FC_DEMO for the Realtek SDK. | The board identifies as RTL8382M_8218B_INTPHY_8214FC_DEMO for the Realtek SDK. | ||
- | ==== OpenWRT | + | ==== OpenWrt |
- | There is complete hardware support in an experimental | + | There is complete hardware support in an experimental |
Original features such as cable integrity tests, offloaded remote mirroring and Port-ACLs are not yet supported. | Original features such as cable integrity tests, offloaded remote mirroring and Port-ACLs are not yet supported. | ||
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* [[https:// | * [[https:// | ||
- | {{tag> | + | {{tag> |