pad_control [Switches]

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====== Pad control ======

To select the peripheral connected to a certain set of SoC pads or pins, the pad control registers are provided. These registers also allows to control some physical properties like the I/O driving current and slew rate.

===== RTL8380 =====

==== Registers ====

These registers are at a base address of 0xBB001000.

^ Offset ^ Name ^ Description ^
| 0x00 | GMII_INTF_SEL | UART1, JTAG, GMII_IF |
| 0x04 | LED_MODE | POWER_ON_BLINK, LED_MODE |
| 0x08 | BOND_DBG | |
| 0x0C | STRAP_DBG | |
| 0x10 | IO_DRIVING_ABILITIY_CTRL | Drive current and slew rate control settings for various peripherals |
| 0x14 | RGMII_DRIVING_ABILITY_CTRL | |
| 0x18 | MAC_IF_CTRL | |
| 0x1C | MAC_EEPROM_TYPE_CTRL | |
| 0x20 | PHY_UP_CTRL | |

===== RTL8390 =====

==== Registers ====

These registers are at a base address of 0xBB000000.

^ Offset ^ Name ^ Description ^
| 0x00 | ECO_DUMMY_CTRL | |
| 0x04 | MAC_IF_CTRL | |
| 0x08 + 4×i | MAC_SERDES_IF_i_CTRL | i = floor(index/8), index = {0, .., 13} |
| 0x10 | IO_DRIVING_ABILITY | Drive current and slew rate control for various peripherals |