Differences
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| Both sides previous revision Previous revision Next revision | Previous revision | ||
| usw-lite-16-poe [2022/03/15 21:57] – Update PCA9555 GPIO lines svanheule | usw-lite-16-poe [2023/01/30 15:28] (current) – Add missing digit svanheule | ||
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| Line 15: | Line 15: | ||
| * 1× Broadcom BCM59121 PSE controller | * 1× Broadcom BCM59121 PSE controller | ||
| * Extra I/O | * Extra I/O | ||
| - | * 2× NXP PCA9555A: 16-bit I2C GPIO expander | + | * 2× NXP PCA9555A: 16-bit I2C GPIO expander |
| * 5× 74VHC595: 8-bit latching shift register with 3-state output enable (U112, U114, U117, U118, U119) | * 5× 74VHC595: 8-bit latching shift register with 3-state output enable (U112, U114, U117, U118, U119) | ||
| - | * Power supply: 100V-240V AC with C13 plug, internal PSU provides power for PoE and switch functions. Low voltage power is managed by an internal TPS23754 802.at PD controller. | + | * Power supply: 100V-240V AC with C13 plug, internal PSU provides power for PoE and switch functions. Low voltage power is managed by an internal TPS23754 802.3at PD controller. |
| ====== Board configuration ====== | ====== Board configuration ====== | ||
| Line 23: | Line 23: | ||
| * SoC | * SoC | ||
| * gpio 0: reset button | * gpio 0: reset button | ||
| + | * gpio 1: /INT of PCA9555 @ 25, falling edge/active low | ||
| * gpio 2: I2C-0 SCL (bit banged) | * gpio 2: I2C-0 SCL (bit banged) | ||
| * gpio 3: I2C-0 SDA (bit banged) | * gpio 3: I2C-0 SDA (bit banged) | ||
| - | * gpio 12: I2C-1 SCL (bit banged) | + | * gpio 12: I2C-1 SCL (bit banged). Defined in OEM, but not used. |
| - | * gpio 13: I2C-1 SDA (bit banged) | + | * gpio 13: I2C-1 SDA (bit banged). Defined in OEM, but not used. |
| * I2C-0: 5 devices reported by '' | * I2C-0: 5 devices reported by '' | ||
| * PoE MCU @ 0x20 (U49) | * PoE MCU @ 0x20 (U49) | ||
| - | * PCA9555A @ 0x22 (U469) | + | * PCA9555A @ 0x22 (U11) |
| + | * /INT: cascaded into U469:P1_7 (gpio 15 on PCA9555A @ 25) | ||
| * gpio 0: port 2 amber PoE status LED | * gpio 0: port 2 amber PoE status LED | ||
| * gpio 1: port 1 amber PoE status LED | * gpio 1: port 1 amber PoE status LED | ||
| Line 38: | Line 40: | ||
| * gpio 6: port 8 amber PoE status LED | * gpio 6: port 8 amber PoE status LED | ||
| * gpio 7: port 7 amber PoE status LED | * gpio 7: port 7 amber PoE status LED | ||
| - | * PCA9555A @ 0x25 (U11) | + | * PCA9555A @ 0x25 (U469) |
| + | * /INT: cascaded into SoC gpio 1 | ||
| * gpio 8: white LED, active high | * gpio 8: white LED, active high | ||
| * gpio 9: blue LED, active high | * gpio 9: blue LED, active high | ||
| * gpio 10: PoE output enable, active high | * gpio 10: PoE output enable, active high | ||
| + | * gpio 15: /INT of PCA9555A @ 22, active low (interrupt on falling edge) | ||
| * NCT375 (LM75A compatible) @ 0x48 (U152): SoC temperature | * NCT375 (LM75A compatible) @ 0x48 (U152): SoC temperature | ||
| * NCT375 (LM75A compatible) @ 0x49 (U153): phy temperature | * NCT375 (LM75A compatible) @ 0x49 (U153): phy temperature | ||
| * I2C-1: no devices reported by '' | * I2C-1: no devices reported by '' | ||