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ws-sw-24p-4s_r1 [2023/03/01 14:12] – oliver | ws-sw-24p-4s_r1 [2023/04/13 19:35] (current) – ZX-SWTG342S svidpet | ||
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- | ====== 24p POE+ 4sfp ====== | + | ====== 24p + 4sfp ====== |
{{ : | {{ : | ||
- | This is an OEM whitelabel managed multi-gigabit POE+ Ethernet switches. | + | This is an Whitelabel(tba) WS-SW-24P-4S r1 managed multi-gigabit POE+ (370W) Ethernet |
- | + | ||
- | === Architecture Overview === | + | |
- | The switch makes use of the various SerDeS units on the [[rtl93xx|RTL9301]]. | + | |
- | + | ||
- | ^ SDS ^ Use ^ Connection | port(s) | | + | |
- | | 0? | RTL8218D | QSGMII | 0 - 4 | | + | |
- | | 1? | RTL8218D | QSGMII | 5 - 7 | | + | |
- | | 2? | RTL8218D | XSGMII | 8 - 15 | | + | |
- | | 3? | RTL8218D | XSGMII | 16 - 23 | | + | |
- | | 4? | SFP+ | 10GBase-R | 24 | | + | |
- | | 6? | SFP+ | 10GBase-R | 25 | | + | |
- | | 8? | SFP+ | 10GBase-R | 26 | | + | |
- | | 9? | SFP+ | 10GBase-R | 27 | | + | |
- | + | ||
- | < | + | |
- | @startuml | + | |
- | package " | + | |
- | node "MIPS 34kc" as mips { | + | |
- | [VPE0] | + | |
- | [VPE1] | + | |
- | } | + | |
- | + | ||
- | database DDR3 { | + | |
- | } | + | |
- | + | ||
- | database Flash { | + | |
- | } | + | |
- | + | ||
- | mips -- DDR3 | + | |
- | + | ||
- | mips -- [SwitchCore] | + | |
- | + | ||
- | [SwitchCore] --> [RTL8218D_0]: | + | |
- | [SwitchCore] <--> [RTL8218D_0]: | + | |
- | + | ||
- | [SwitchCore] --> [RTL8218D_1]: | + | |
- | [SwitchCore] <--> [RTL8218D_1]: | + | |
- | + | ||
- | [SwitchCore] --> [RTL8218D_2]: | + | |
- | [SwitchCore] <--> [RTL8218D_2]: | + | |
- | + | ||
- | [SwitchCore] <--> [SFP0] : I2C DATA | + | |
- | [SwitchCore] <--> [SFP1] : IC2 DATA | + | |
- | [SwitchCore] <--> [SFP2] : IC2 DATA | + | |
- | [SwitchCore] <--> [SFP3] : IC2 DATA | + | |
- | + | ||
- | mips -- [SPI0] | + | |
- | [SPI0] <--> Flash: QSPI | + | |
- | + | ||
- | mips -- [UART0] | + | |
- | } | + | |
- | + | ||
- | [SwitchCore] --> [RTL8321_0]: | + | |
- | RTL8321_0 --> [RTL8321_1] : Dailychain | + | |
- | + | ||
- | [UART0] -- console | + | |
- | + | ||
- | RTL8218D_0 --> " | + | |
- | RTL8218D_1 --> " | + | |
- | RTL8218D_2 --> " | + | |
- | + | ||
- | SFP0 --> lan25 | + | |
- | SFP1 --> lan26 | + | |
- | SFP2 --> lan27 | + | |
- | SFP3 --> lan28 | + | |
- | @enduml | + | |
- | </ | + | |
- | + | ||
- | + | ||
- | ===== Models ===== | + | |
- | ===== Hardware ===== | + | |
- | * [[rtl93xx|RTL9301]] SoC | + | |
- | * Winbond [[https:// | + | |
- | * Winbond W632GG6NB-1q (256MB DDR3 SDRAM) | + | |
- | * 2x [[RTL8231]] GPIO extender to control the port LEDs + 3x [[https:// | + | |
- | * 3x RTL8218D 8x Gigabit PHY | + | |
- | * 3x RTL8238B POE controller | + | |
- | * Holtek [[https:// | + | |
- | * reset button | + | |
- | * power-led (pwr1, always not controllable) | + | |
- | * run-led (sys1, gpio0) | + | |
- | + | ||
- | 4 Uplink ports are SFP+ cages which support 10GBit Base-X mini GBIC modules. | + | |
- | + | ||
- | Power is supplied via a 100V-24-V 10A standard IEC connector. | + | |
- | A Serial header can be connected to from the outside of the switch | + | |
- | + | ||
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{ : | + | |
- | {{: | + | |
- | {{ : | + | |
- | + | ||
- | ==== OEM Firmware ===== | + | |
- | === OEM U-Boot environment === | + | |
- | < | + | |
- | RTL9300# # printenv | + | |
- | baudrate=115200 | + | |
- | boardmodel=RTL8393M_DEMO | + | |
- | bootcmd=boota | + | |
- | bootdelay=1 | + | |
- | ethaddr=00: | + | |
- | ipaddr=192.168.1.1 | + | |
- | ledModeInitSkip=0 | + | |
- | serverip=192.168.1.111 | + | |
- | stderr=serial | + | |
- | stdin=serial | + | |
- | stdout=serial | + | |
- | + | ||
- | Environment size: 217/65532 bytes | + | |
- | </ | + | |
- | === OEM SYS environment === | + | |
- | < | + | |
- | RTL9300# # printsys | + | |
- | bootpartition=1 | + | |
- | ...< | + | |
- | System information size: 4093/4096 bytes | + | |
- | </ | + | |
- | + | ||
- | === OEM bootlog === | + | |
- | ++++ Bootlog | | + | |
- | < | + | |
- | U-Boot 2011.12.(3.6.7.55090) (Jan 11 2023 - 11:23:36) | + | |
- | + | ||
- | Board: RTL9300 CPU:800MHz LX:175MHz DDR: | + | |
- | DRAM: 256 MB | + | |
- | SPI-F: WINBOND/ | + | |
- | Loading 65536B env. variables from offset 0xe0000 | + | |
- | Net: Net Initialization Skipped | + | |
- | No ethernet found. | + | |
- | Hit Esc key to stop autoboot: | + | |
- | ## dual_image_sel ... -1-1-1 | + | |
- | ## Booting image from partition ... 1 | + | |
- | ## Booting kernel from Legacy Image at 81000000 ... | + | |
- | Image Name: | + | |
- | | + | |
- | Image Type: MIPS Linux Kernel Image (lzma compressed) | + | |
- | Data Size: 9173575 Bytes = 8.7 MB | + | |
- | Load Address: 80000000 | + | |
- | Entry Point: | + | |
- | | + | |
- | | + | |
- | + | ||
- | Starting kernel ... | + | |
- | + | ||
- | + | ||
- | Loading drivers..................................OK | + | |
- | Loading basic manager applications...............OK | + | |
- | Loading L2 applications..........................OK | + | |
- | Loading L3 applications..........................OK | + | |
- | Loading manager applications.....................OK | + | |
- | Load successfully. | + | |
- | + | ||
- | Username(1-64 chars): | + | |
- | Password(1-128 chars): | + | |
- | + | ||
- | Switch> | + | |
- | </ | + | |
- | ++++ | + | |
- | + | ||
- | ==== OEM Flash layout ==== | + | |
- | === U-Boot === | + | |
- | < | + | |
- | RTL9300# # flshow | + | |
- | =============== FLASH Partition Layout =============== | + | |
- | Index Name | + | |
- | ------------------------------------------------------ | + | |
- | | + | |
- | | + | |
- | | + | |
- | | + | |
- | | + | |
- | | + | |
- | | + | |
- | ====================================================== | + | |
- | </ | + | |
- | + | ||
- | === GPIO's === | + | |
- | By looking at 0xb8003300 from U-Boot, we can see the GPIO's toggling the bits. Inserting an SFP module into the SFP port triggers ' | + | |
- | + | ||
- | * GPIO D3 (03) seems to be connected to the reset button | + | |
- | * GPIO C4 (12) seems to be connected to port24 (sfp0) TXD | + | |
- | * GPIO C5 (13) seems to be connected to port24 (sfp0) LOS | + | |
- | * GPIO C6 (14) seems to be connected to port25 (sfp1) TXD | + | |
- | * GPIO C7 (15) seems to be connected to port25 (sfp1) LOS | + | |
- | * GPIO C8 (16) seems to be connected to port26 (sfp2) TXD | + | |
- | * GPIO B1 (17) seems to be connected to port26 (sfp2) LOS | + | |
- | * GPIO B2 (18) seems to be connected to port27 (sfp3) TXD | + | |
- | * GPIO B3 (19) seems to be connected to port27 (sfp3) LOS | + | |
- | + | ||
- | === Connectors === | + | |
- | Order of pinout is not the same for J1 and J2 ... | + | |
- | + | ||
- | == J1 == | + | |
- | * 1: VDD | + | |
- | * 2: GPIO00 (SYS_LED) | + | |
- | * 3: LED_CLK (rtl8231) | + | |
- | * 4: LED_DAT (rtl8231) | + | |
- | * 5: Reset (rtl8231) | + | |
- | * 6: GND | + | |
- | * 7: LED Latch (from POE controller? | + | |
- | * 8: MOSI (from POE controller? | + | |
- | * 9: LED Output enable (from POE controller? | + | |
- | * 10: SCK (from POE controller? | + | |
- | + | ||
- | == J2 == | + | |
- | * 1: VDD | + | |
- | * 2: VDD | + | |
- | * 3: JTAG_TDO | + | |
- | * 4: JTAG_TMS | + | |
- | * 5: JTAG_TCK | + | |
- | * 6: JTAG_TDI | + | |
- | * 7: GND | + | |
- | * 8: GND | + | |
- | * 9: MOSI (from POE controller? | + | |
- | * 10: LED Latch (from POE controller? | + | |
- | * 11: SCK (from POE controller? | + | |
- | * 12: LED Output enable (from POE controller? | + | |
- | Probably to test/sniff the POE leds and/or program the POE micro controller; though that one has its own pinout (J3) ... | + | |
+ | It is a whitelabeled [[rtl93xx: |