Differences
This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision | ||
zyxel_xgs1210-12 [2021/02/03 16:59] – Correct the spelling of the OpenWrt project name pepe2k | zyxel_xgs1210-12 [2022/07/16 14:06] (current) – Moved to zyxel_xgs1210_series oliver | ||
---|---|---|---|
Line 1: | Line 1: | ||
- | ====== Zyxel XGS1210-12 ====== | + | Moved to [[zyxel_xgs1210_series]] |
- | + | ||
- | The XGS1210-12 is a 10 + 2-port Multi-Gigabit L3 switch. It has 8 Gigabit ports, 2 2.5 Gigabit Ethernet ports and 2 SFP+ 10GBit uplink cages. | + | |
- | + | ||
- | ===== Hardware ===== | + | |
- | * [[rtl930x|RTL9302B]] SoC | + | |
- | * Macronix MX25L12833F (16MB flash) | + | |
- | * Nanja NT5CC64M16GP-1 (128MB DDR3 SDRAM) | + | |
- | * [[RTL8231]] GPIO extender | + | |
- | * RTL8218D 8x Gigabit PHY | + | |
- | * 2 RTL8226 2.5 Gigabit PHYs | + | |
- | + | ||
- | 2 Uplink ports are SFP+ cages which support 10GBit Base-X mini GBIC modules. | + | |
- | + | ||
- | Power is supplied via a 12V 1.5A standard barrel connector. At the right side behind the grid is UART serial connector. | + | |
- | A Serial header can be connected to from the outside of the switch trough the airvents with a standard 2.54mm header. Pins are from top to bottom Vcc(3.3V), TX, RX and GND. Serial connection is via 115200 baud, 8N1. | + | |
- | ==== Board details ==== | + | |
- | + | ||
- | {{wiki: | + | |
- | + | ||
- | + | ||
- | ===== Firmware ===== | + | |
- | + | ||
- | It ships with a u-boot bootloader (U-Boot Version V1.0.0.1 (Oct 14 2019 - 17:51:23)) based on Realtek' | + | |
- | + | ||
- | < | + | |
- | Board: RTL9300 CPU:800MHz LX:175MHz DDR: | + | |
- | DRAM: 128 MB | + | |
- | SPI-F: MXIC/ | + | |
- | Loading 65536B env. variables from offset 0xe0000 | + | |
- | Net: Net Initialization Skipped | + | |
- | No ethernet found. | + | |
- | Hit Esc key to stop autoboot: | + | |
- | + | ||
- | RTL9300# # rtk network on | + | |
- | Enable network | + | |
- | RTCORE Driver Module Initialize | + | |
- | IOAL init | + | |
- | Hardware-profile probe GPIO probe (unit 0): (found) | + | |
- | GPIO Init | + | |
- | RTL8231 probe (unit 0): (found) | + | |
- | RTL8231 init (unit 0) | + | |
- | | + | |
- | Hardware-profile init | + | |
- | GPIO probe (unit 0): (found) | + | |
- | GPIO Init rtl9300_gpio_init had already been initialized! | + | |
- | + | ||
- | SPI init (unit 0) | + | |
- | I2C probe (unit 0) | + | |
- | I2C init (unit 0) | + | |
- | RTL8231 probe (unit 0): (found) | + | |
- | RTL8231 init (unit 0) | + | |
- | | + | |
- | NIC probe (unit 0) | + | |
- | Loader RTNIC Driver Module Initialize | + | |
- | IOAL init | + | |
- | RTK Driver Module Initialize | + | |
- | MAC probe (unit 0) | + | |
- | Chip 9302 (found) | + | |
- | MAC init (unit 0) | + | |
- | SMI protocol probe (unit 0) | + | |
- | PHY probe (unit 0) | + | |
- | Chip Construct (unit 0) | + | |
- | Chip Construct | + | |
- | Disable PHY Polling | + | |
- | PHY Reset | + | |
- | MAC Construct | + | |
- | Turn Off Serdes | + | |
- | Serdes Construct | + | |
- | PHY Construct | + | |
- | Turn On Serdes | + | |
- | Enable PHY Polling | + | |
- | Misc | + | |
- | PHY init (unit 0) | + | |
- | Mgmt_dev init (unit 0) | + | |
- | Please wait for PHY init-time ... | + | |
- | + | ||
- | RTL9300# # run loadcmd | + | |
- | Using rtl9300#0 device | + | |
- | TFTP from server 192.168.1.150; | + | |
- | Filename ' | + | |
- | Load address: 0x84f00000 | + | |
- | Loading: ################################################################# | + | |
- | ################################################################# | + | |
- | ################################################################# | + | |
- | ################################################################# | + | |
- | ################################################################# | + | |
- | ################################################################# | + | |
- | ########################### | + | |
- | done | + | |
- | Bytes transferred = 6110544 (5d3d50 hex) | + | |
- | RTL9300# # bootm | + | |
- | ## Booting kernel from Legacy Image at 84f00000 ... | + | |
- | Image Name: | + | |
- | | + | |
- | Image Type: MIPS Linux Kernel Image (gzip compressed) | + | |
- | Data Size: 6110480 Bytes = 5.8 MB | + | |
- | Load Address: 80220000 | + | |
- | Entry Point: | + | |
- | | + | |
- | | + | |
- | + | ||
- | Starting kernel ... | + | |
- | + | ||
- | [ 0.000000] Linux version 5.4.70 (birger@AMDDesktop) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r14727-627da9a38c)) #0 Wed Dec 2 18:53:07 2020 | + | |
- | [ 0.000000] prom_init called | + | |
- | [ 0.000000] RTL838X model is 0 | + | |
- | [ 0.000000] RTL839X model is 0 | + | |
- | [ 0.000000] RTL93XX model is 93021001 | + | |
- | [ 0.000000] SoC Type: RTL9302 | + | |
- | [ 0.000000] Kernel command line: | + | |
- | [ 0.000000] printk: bootconsole [early0] enabled | + | |
- | [ 0.000000] CPU0 revision is: 00019555 (MIPS 34Kc) | + | |
- | [ 0.000000] plat_mem_setup called | + | |
- | [ 0.000000] MIPS: machine is Zyxel XGS1210-12 Switch | + | |
- | [ 0.000000] Registering _machine_restart | + | |
- | [ 0.000000] NO PCI device found | + | |
- | [ 0.000000] Initrd not found or empty - disabling initrd | + | |
- | [ 0.000000] device_tree_init called | + | |
- | [ 0.000000] Using appended Device Tree. | + | |
- | [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | + | |
- | [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | + | |
- | [ 0.000000] Zone ranges: | + | |
- | [ 0.000000] | + | |
- | [ 0.000000] Movable zone start for each node | + | |
- | [ 0.000000] Early memory node ranges | + | |
- | [ 0.000000] | + | |
- | [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] | + | |
- | [ 0.000000] On node 0 totalpages: 32768 | + | |
- | [ 0.000000] | + | |
- | [ 0.000000] | + | |
- | [ 0.000000] | + | |
- | [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 | + | |
- | [ 0.000000] pcpu-alloc: [0] 0 | + | |
- | [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480 | + | |
- | [ 0.000000] Kernel command line: console=ttyS0, | + | |
- | [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) | + | |
- | [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) | + | |
- | [ 0.000000] Writing ErrCtl register=00028d08 | + | |
- | [ 0.000000] Readback ErrCtl register=00028d08 | + | |
- | [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off | + | |
- | [ 0.000000] Memory: 114836K/ | + | |
- | [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, | + | |
- | [ 0.000000] NR_IRQS: 64 | + | |
- | [ 0.000000] Found Interrupt controller: cpuintc (cpuintc) | + | |
- | [ 0.000000] ICU Memory: b8003000 | + | |
- | [ 0.000000] random: get_random_bytes called from start_kernel+0x32c/ | + | |
- | [ 0.000000] CPU frequency from device tree: 700000000 | + | |
- | [ 0.000000] CPU Clock: 700 MHz | + | |
- | [ 0.000000] PLL control register: 0 | + | |
- | [ 0.000000] Found NS16550a: uart (uart@b8002000) | + | |
- | [ 0.000000] Using default baud rate: 38400 | + | |
- | [ 0.000000] clocksource: | + | |
- | [ 0.000008] sched_clock: | + | |
- | [ 0.009618] printk: console [ttyS0] enabled | + | |
- | [ 0.009618] printk: console [ttyS0] enabled | + | |
- | [ 0.020076] printk: bootconsole [early0] disabled | + | |
- | [ 0.020076] printk: bootconsole [early0] disabled | + | |
- | </ | + | |
- | + | ||
- | ==== OpenWrt Support ==== | + | |
- | There is experimental OpenWrt support: the device boots and the Ethernet and switch driver function. The 1 and 2.5 GBit ports work, but not the SFP+ cages. No GPIO support so far. | + | |
- | + | ||
- | ===== References ===== | + | |
- | * [[https:// | + | |
- | * [[https:// | + | |
- | + | ||
- | {{tag> | + |