zyxel_xgs1210_series

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zyxel_xgs1210_series [2022/09/28 07:47] – Add Simplyfied architectual diagram oliverzyxel_xgs1210_series [2024/05/11 06:23] (current) – Show hidden blocks svanheule
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 === Architecture Overview === === Architecture Overview ===
 +The XGS1210 platform makes use of the various SerDeS units on the [[rtl93xx|RTL9302]].
 +
 +^ SDS ^ Use ^
 +| 2 | RTL8218D |
 +| 6 | RTL8226 |
 +| 7 | RTL8226 |
 +| 8 | SFP+ |
 +| 9 | SFP+ |
 +
 <uml> <uml>
 package "RTL93xx" { package "RTL93xx" {
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   database DDR3 {   database DDR3 {
 +  }
 +  
 +  database Flash {
   }   }
      
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   mips <-- [SwitchCore] : IRQ23   mips <-- [SwitchCore] : IRQ23
  
-  [SwitchCore] --> RTL8321: MDI Bus+  [SwitchCore] --> [RTL8321]: MDI Bus
  
-  [SwitchCore] --> RTL8218D: MDI Bus +  [SwitchCore] --> [RTL8218D]: MDI Bus 
-  [SwitchCore] <--> RTL8218D: MII/8+  [SwitchCore] <--> [RTL8218D]: MII/8
  
-  [SwitchCore] --> RTL8266_0: MDI Bus +  [SwitchCore] --> [RTL8266_0]: MDI Bus 
-  [SwitchCore] <--> RTL8266_1: MII+  [SwitchCore] <--> [RTL8266_1]: MII
  
-  [SwitchCore] --> SFP : I2C CLK +  [SwitchCore] <--> [SFP0] : I2C DATA 
-  [SwitchCore] <--> SFP0 : I2C DATA +  [SwitchCore] <--> [SFP1] : IC2 DATA
-  [SwitchCore] <--> SFP1 : IC2 DATA+
  
   mips --> [SPI0] : 0x18001200   mips --> [SPI0] : 0x18001200
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 [UART0] --> console [UART0] --> console
  
-node "Flash" { +RTL8218D --> "lan1-8" 
-}+RTL8266_0 --> lan9 
 +RTL8266_1 --> lan10
  
-node "RTL8321" { +SFP0 --> lan11 
-} +SFP1 --> lan12
- +
-node "RTL8218D" { +
-} +
- +
-RTL8218D --> lan1..8 +
- +
-node "RTL8266_0" { +
-} +
-RTL8266_0 --> lan10 +
- +
-node "RTL8266_1" { +
-} +
-RTL8266_1 --> lan11 +
- +
-node "SFP" { +
-  node "SFP0" {   +
-  } +
- +
-  node "SFP1" { +
-  } +
-}+
  
-RTL8321 --> lan1..8_lime +RTL8321 --> "lan1-8_lime" 
-RTL8321 --> lan1..8_amber+RTL8321 --> "lan1-8_amber"
  
-RTL8321 --> lan11..12_blue +RTL8321 --> "lan11-12_blue" 
-RTL8321 --> lan11..12_lime+RTL8321 --> "lan11-12_lime"
 </uml> </uml>
  
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   * RTL8218D 8x Gigabit PHY   * RTL8218D 8x Gigabit PHY
   * 2 RTL8226 2.5 Gigabit PHYs   * 2 RTL8226 2.5 Gigabit PHYs
-  * reset button (XGS1210-12 only!)+  * reset button (XGS1210-12 only!) [[https://tech.alpsalpine.com/e/products/detail/SKRTLAE010/|ALPS]] {{ :skrt.pdf |datasheet}}
  
 2 Uplink ports are SFP+ cages which support 10GBit Base-X mini GBIC modules. 2 Uplink ports are SFP+ cages which support 10GBit Base-X mini GBIC modules.
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 {{:zyxel_xgs1010-12_back.jpg?200}} {{:zyxel_xgs1010-12_back.jpg?200}}
 {{::zyxel_xgs1010_strapping_pins.jpg?200|}} {{::zyxel_xgs1010_strapping_pins.jpg?200|}}
 +{{:xgs-12xx_sfp_traces.png?400|}}
 +{{:xgs-12xx_traces.png?400|}}
  
 Close up of the strapping pins match what we get from peripherial address **0xb8000100**: __0x0080200__ __0b1000000001000000000__. It doesn't tell us what is what however, when looking at [[The struct definition|https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/openwrt-dev/loader/u-boot-2011.12/arch/otto40/plr/src/platform/9300/register_map.h#L346]] or the datasheet: Close up of the strapping pins match what we get from peripherial address **0xb8000100**: __0x0080200__ __0b1000000001000000000__. It doesn't tell us what is what however, when looking at [[The struct definition|https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/openwrt-dev/loader/u-boot-2011.12/arch/otto40/plr/src/platform/9300/register_map.h#L346]] or the datasheet:
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 === OEM bootlog === === OEM bootlog ===
-++++ Bootlog | 
 <code> <code>
 U-Boot 2011.12.(TRUNK_CURRENT)-svn99721 (Oct 24 2019 - 09:15:40) U-Boot 2011.12.(TRUNK_CURRENT)-svn99721 (Oct 24 2019 - 09:15:40)
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 RTK.0>  RTK.0> 
 </code> </code>
-++++ 
  
 ==== OEM tech-support ==== ==== OEM tech-support ====
-++++ sys dump | 
 <code> <code>
 RTK.0> sys dump hwp all RTK.0> sys dump hwp all
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 info->unitInfo[0].parsed_info=86c90000 info->unitInfo[0].parsed_info=86c90000
 </code> </code>
-++++ 
  
  
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 Device  Pin  Direction  Default  Current  Purpose Device  Pin  Direction  Default  Current  Purpose
 ------- ---- ---------- -------- -------- -------- ------- ---- ---------- -------- -------- --------
-INT     0    OUT        0        0        SYSTEM-LED +INT      0   OUT        0        0        SYSTEM-LED 
-INT     6    IN         1        1        HW_VER_BIT0 +INT      1   N/A                          Not Connected 
-INT     7    IN         1        0        HW_VER_BIT1 +INT      2   N/A                          Not Connected 
-INT 8   SFP0/SFP1: SCK +SPI      3   N/A                          Goes to unpopluated U23 (SPI_CLK) 
-INT 9   SFP0: SDA +SPI      4   N/A                          Goes to unpopluated U23 (SPI_MISO) 
-INT 10   SFP1: SDA +SPI      5   N/A                          Goes to unpopluated U23 (SPI_MOSI) 
-INT     11   OUT        0        0        SFP0: TX_DIS_FX_0 +INT      6   IN         0        0        Permanently Pulled down, likely to indicate presence of U23 
-INT     12   IN         0        0        SFP0: MOD-DEF0 +INT      7   IN         1        1        Permanently Pulled up, likely to indicate presence of ...? 
-INT     13   IN         0        0        SFP0: LOS +I2C  8   OUT                          Shared SFP clock (SFP0/SFP1: SCK) Pull-up near SFP0 
-INT     14   IN         0        0         +I2C  9   I/O                          SDA0: (SFP0_SDA) Pull-up near SFP0 
-INT     15   OUT        0        0        SPF1: TX_DIS_FX_1 +I2C 10   I/O                          SDA1: (SFP1_SDA) Pull-up near SFP1 
-INT     16   IN         0        1        SFP1: MOD-DEF0 +INT     11   OUT        0        0        Transmit Disable (SFP0: TX_DIS_FX) Pull-up near SFP0 
-INT     17   IN         0        1        SFP1: LOS +INT     12   IN         0        0        Absent detection (SFP0: MOD-DEF0) Pull-up near SFP0 
-INT     20   IN         0        1 +INT     13   IN         0        0        Los of Signal (SFP0: LOS) Pull-up near SFP0 (pull down NP option) 
-INT     21   OUT        1        1        Reset_PHY +INT     14   IN         0        0        Transmit Fault (SFP0: TX_FAULT) Pull-up near SFP0 
-INT     22   IN         1        1        Reset_Button+INT     15   OUT        0        0        Transmit Disable (SFP1: TX_DIS_FX) Pull-up near SFP1 
 +INT     16   IN         0        0        Absent detection (SFP1: MOD-DEF0) Pull-up near SFP1 
 +INT     17   IN         0        0        Los of Signal (SFP1: LOS) Pull-up near SFP1 (pull down NP option) 
 +INT     18   IN         0        0        Permanently pulled down? Trace not found ... 
 +INT     19   IN         0        0        Permanently pulled down? Trace not found ... 
 +INT     20   OUT        0        0        Goes to U10? 
 +INT     21   IN         0        0        Transmit Fault (SFP1: TX_FAULT) Pull-up near SFP1 
 +INT     22   OUT        1        1        Reset_PHY? 
 +INT     23   IN                           Reset Button
 </code> </code>
 +Note, that RS0/RS1 for both SFP's have permanent pull-ups, but also have the pull-down option.
 +Not connected/lost traces can still exist on an internal layer (Reset for example).
 +
 +== USB ==
 +While this switch has no USB ports, the USB pins appear to be on TP2 and TP3 on the bottom (to be confirmed)
  
 {{ :tech-support.rtf | Full tech-support output}} {{ :tech-support.rtf | Full tech-support output}}
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 ============= Factory Test End ! ============= ============= Factory Test End ! =============
 </code> </code>
-The OEM bootloader (U-Boot 2011.12.(TRUNK_CURRENT)-svn99721 (Oct 24 2019 - 09:15:40)) runs a [[https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1010/loader/u-boot-2011.12/common/main.c#L223|self-check]] upon startup. This check byte is in the middle of the flash, [[stored at address `0x810000` (just beyond the 8MiB marker) on the XGS1010-12|https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1010/loader/u-boot-2011.12/board/Realtek/switch/sdk/system/uboot/cmd/uboot_func.c#L61]]. This means with the XGS1010-12 bootloader, it is not possible to make use of larger firmwares that span this region. The upside is, unless Zyxel recompiled their firmware (unnecessary work for them, but possible), using a smaller flash-chip would be less-likely.+The OEM bootloader (U-Boot 2011.12.(TRUNK_CURRENT)-svn99721 (Oct 24 2019 - 09:15:40)) runs a [[https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1010/loader/u-boot-2011.12/common/main.c#L223|self-check]] upon startup. This check byte is in the middle of the flash, [[https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1010/loader/u-boot-2011.12/board/Realtek/switch/sdk/system/uboot/cmd/uboot_func.c#L61|stored at address `0x810000` (just beyond the 8MiB marker) on the XGS1010-12]]. With the recently new introduced mtd-concat, we can however define two regions and concatate those logically in Linux. The upside is, unless Zyxel recompiled their firmware (unnecessary work for them, but possible), using a smaller flash-chip would be less-likely.
  
 As an alternative, the XGS1210-12 U-Boot binary can be flashed, which turns the XGS1010-12 'more' into a XGS1210-12, [[https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1210/sdk/system/uboot/cmd/uboot_func.c#L62|which puts this self-check at the end of the flash]]. As an alternative, the XGS1210-12 U-Boot binary can be flashed, which turns the XGS1010-12 'more' into a XGS1210-12, [[https://gitlab.com/olliver/openwrt/realtek_sdk/-/blob/xgs1210/sdk/system/uboot/cmd/uboot_func.c#L62|which puts this self-check at the end of the flash]].
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 ===== OpenWRT Bootlog ==== ===== OpenWRT Bootlog ====
-++++ Full OpenWRT Bootlog | 
 <code> <code>
 Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz
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 [    0.020076] printk: bootconsole [early0] disabled [    0.020076] printk: bootconsole [early0] disabled
 </code> </code>
-++++ 
  
 ==== OpenWrt Support ==== ==== OpenWrt Support ====
  • zyxel_xgs1210_series.1664351241.txt.gz
  • Last modified: 2022/09/28 07:47
  • by oliver