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zyxel_xs1930_series [2020/10/26 12:42] – Move page from XGS1930 series svanheule | zyxel_xs1930_series [2022/11/15 15:48] (current) – Remove trailing space pmenzel | ||
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| XS1930-10 | 8 | 2 | - | | | XS1930-10 | 8 | 2 | - | | ||
| XS1930-12HP | 10 | 2 | 8 | | | XS1930-12HP | 10 | 2 | 8 | | ||
+ | | XS1930-12F | 2 | 10 | - | | ||
===== Models ===== | ===== Models ===== | ||
Line 11: | Line 12: | ||
=== Hardware === | === Hardware === | ||
* SoC: RTL9313 | * SoC: RTL9313 | ||
- | * Ethernet: | + | * Ethernet: |
* RAM: Winbond W632GU6MB 256MiB DDR3 | * RAM: Winbond W632GU6MB 256MiB DDR3 | ||
* Flash: Macronix MX25L25645G, | * Flash: Macronix MX25L25645G, | ||
* GPIO: 1× RTL8231 | * GPIO: 1× RTL8231 | ||
- | | + | |
* 3-pin fan | * 3-pin fan | ||
- | The serial port is accessible via pins from from the outside on the right side of the device. Pins are front to back: GND, TX, RX, Vcc. | + | The serial port is accessible via pins from the outside on the right side of the device. Pins are front to back: GND, TX, RX, Vcc. |
- | Port settings are 115200 baud, 8n1, with 3.3 logic level. | + | Port settings are 115200 baud, 8n1, with 3.3V logic level. |
+ | |||
+ | If you are using a Raspberry Pi, ensure that the serial port is activated first, many guides list these steps, here is a decent guide: https:// | ||
+ | |||
+ | Once wired up, and the serial port is enabled test that this works. | ||
+ | |||
+ | $ setserial -g / | ||
+ | |||
+ | /dev/ttyS0, UART: 16550A, Port: 0x03f8, IRQ: 4 | ||
+ | /dev/ttyS1, UART: 16550A, Port: 0x02f8, IRQ: 3 | ||
+ | /dev/ttyS2, UART: unknown, Port: 0x03e8, IRQ: 4 | ||
+ | /dev/ttyS3, UART: unknown, Port: 0x02e8, IRQ: 3 | ||
+ | |||
+ | It's likely /dev/ttyS0, use Linux' | ||
+ | |||
+ | $ cu -l /dev/ttyS0 -s 115200 | ||
+ | |||
+ | If done correctly, you will be presented with a login prompt, the login credentials for the web interface and this serial interface are the same. Test that the system is wired properly before restarting. | ||
=== Photos === | === Photos === | ||
^ Board ^ Pictures ^ | ^ Board ^ Pictures ^ | ||
- | | Overview | {{: | + | | Overview | {{: |
| Main board | {{: | | Main board | {{: | ||
+ | | Serial port location | {{: | ||
+ | | Serial Port connected (raspi client) | {{: | ||
+ | |||
+ | ===== Firmware ===== | ||
+ | The firmware of the Zyxel 1930 devices is based on Zynos [[https:// | ||
+ | The normal startup sequence is | ||
+ | < | ||
+ | Bootbase Version: V1.00 | 08/26/2019 16:03:22 | ||
+ | RAM: Size = 262144 Kbytes | ||
+ | DRAM POST: Testing: | ||
+ | OK | ||
+ | DRAM Test SUCCESS ! | ||
+ | FLASH: 32M | ||
+ | |||
+ | ZyNOS Version: V4.60(ABQE.0)C0 | 12/20/2019 14:53:53 | ||
+ | |||
+ | Press any key to enter debug mode within 1 second. | ||
+ | ....... | ||
+ | Enter Debug Mode | ||
+ | |||
+ | XS1930-10> | ||
+ | ======= Debug Command Listing ======= | ||
+ | AT just answer OK | ||
+ | ATHE print help | ||
+ | ATBAx | ||
+ | ATENx, | ||
+ | ATSE show the seed of password generator | ||
+ | ATTI(h, | ||
+ | ATDA(y, | ||
+ | ATDS dump RAS stack | ||
+ | ATDT dump Boot Module Common Area | ||
+ | ATDUx, | ||
+ | ATRBx | ||
+ | ATRWx | ||
+ | ATRLx | ||
+ | ATGO(x) | ||
+ | ATGR boot router | ||
+ | ATGT run Hardware Test Program | ||
+ | ATRTw, | ||
+ | ATSH dump manufacturer related data in ROM | ||
+ | ATDOx, | ||
+ | ATTD download router configuration to PC via XMODEM | ||
+ | ATUR upload router firmware to flash ROM | ||
+ | |||
+ | < press any key to continue > | ||
+ | ATLC upload router configuration file to flash ROM | ||
+ | ATXSx | ||
+ | ATSR system reboot | ||
+ | ATFT(x, | ||
+ | ATPA(x) | ||
+ | ATCP show CPU | ||
+ | ATGI | ||
+ | |||
+ | XS1930-10> | ||
+ | OK | ||
+ | |||
+ | OKXS1930-10> | ||
+ | ZyNOS Version | ||
+ | Bootbase Version | ||
+ | Serial Number | ||
+ | Vendor Name : Zyxel | ||
+ | Product Model : XS1930-10 | ||
+ | ZyNOS ROM address | ||
+ | System Type : 8 | ||
+ | First MAC Address | ||
+ | Last MAC Address | ||
+ | MAC Address Quantity | ||
+ | Default Country Code : FF | ||
+ | Boot Module Debug Flag : 00 | ||
+ | CPLD Version | ||
+ | RomFile Version | ||
+ | RomFile Checksum | ||
+ | ZyNOS Checksum | ||
+ | SNMP MIB level & OID : 060102030405060708091011121314151617181920 | ||
+ | Main Feature Bits : C0 | ||
+ | Other Feature Bits : | ||
+ | 02 74 00 00 00 00 00 00-00 00 00 00 00 00 00 00 | ||
+ | 00 00 00 00 00 00 00 00-00 13 00 00 00 00 | ||
+ | |||
+ | OK | ||
+ | |||
+ | XS1930-10> | ||
+ | ROMIO image start at 0xb4280000 | ||
+ | code version: | ||
+ | code start: 0x80220000 | ||
+ | code length: 5745CA | ||
+ | memMapTab: 27 entries, start = 0xb42b0000, checksum = 75B9 | ||
+ | $RAM Section: | ||
+ | 0: BootExt(RAMBOOT), | ||
+ | 1: BootData(RAM), | ||
+ | 2: RasCode(RAMCODE), | ||
+ | 3: RasData(RAM), | ||
+ | 4: BootExtA(RAMBOOT), | ||
+ | 5: RasCodeA(RAMCODE), | ||
+ | $ROM Section: | ||
+ | 6: BootBas(ROMIMG), | ||
+ | 7: DbgArea(ROMIMG), | ||
+ | 8: RomDir2(ROMDIR), | ||
+ | 9: LogArea1(ROMIMG), | ||
+ | 10: LogArea2(ROMIMG), | ||
+ | 11: License(ROMIMG), | ||
+ | 12: GenFS(ROMIMG), | ||
+ | 13: LogArea3(ROMIMG), | ||
+ | 14: Reserved(ROMIMG), | ||
+ | 15: ramParam(ROMIMG), | ||
+ | 16: BootExt(ROMIMG), | ||
+ | 17: MemMapT(ROMMAP), | ||
+ | 18: termcap(ROMIMG), | ||
+ | 19: RomDefa(ROMBIN), | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | 20: RasCode(ROMBIN), | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | 21: RomDir2A(ROMDIR), | ||
+ | 22: BootExtA(ROMIMG), | ||
+ | 23: MemMapTA(ROMMAP), | ||
+ | 24: termcapA(ROMIMG), | ||
+ | 25: RomDefaA(ROMBIN), | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | 26: RasCodeA(ROMBIN), | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | $USER Section: | ||
+ | Msecs 128 | ||
+ | Heap0 16 34816 4096 | ||
+ | Heap1 32 24576 2048 | ||
+ | Heap2 64 65520 8192 | ||
+ | Heap3 128 16384 1024 | ||
+ | Heap4 192 8192 1024 | ||
+ | Heap5 256 2048 128 | ||
+ | Heap6 320 2048 128 | ||
+ | Heap7 384 576 128 | ||
+ | Heap8 448 512 64 | ||
+ | Heap9 512 256 128 | ||
+ | Heap10 576 1536 64 | ||
+ | Heap11 1024 1088 64 | ||
+ | Heap12 1536 1280 128 | ||
+ | Heap13 2048 512 128 | ||
+ | Heap14 4096 542 64 | ||
+ | Heap15 8192 158 8 | ||
+ | Heap16 10496 606 32 | ||
+ | Heap17 12288 94 16 | ||
+ | Heap18 13312 320 5 | ||
+ | Heap19 17408 158 5 | ||
+ | Heap20 26944 1200 5 | ||
+ | Heap21 36864 30 3 | ||
+ | Heap22 64000 20 3 | ||
+ | MbufInt 400 400 400 | ||
+ | MbufIO | ||
+ | Queue 128 | ||
+ | Cbuf 40960 | ||
+ | FuncId | ||
+ | Proc 128 | ||
+ | Timer 1024 | ||
+ | DNS 128 | ||
+ | FilterSet 12 | ||
+ | IpRoute 33 | ||
+ | IpxRoute 4 | ||
+ | IpMaxRt 128 | ||
+ | IpxMaxRt 128 | ||
+ | IpxMaxSap 128 | ||
+ | FwTos 1200 10 10 10 | ||
+ | AclType0 51200 9 400 | ||
+ | AclType1 2048 4 100 | ||
+ | AclType2 2048 4 20 | ||
+ | AclType3 2048 4 128 | ||
+ | AclType4 2048 4 128 | ||
+ | AclType5 32768 8 128 | ||
+ | AppleTalkRoute 0 | ||
+ | Bridge 4 | ||
+ | RemoteNode 1 | ||
+ | Profile 1 | ||
+ | Endpoint 4 | ||
+ | NATServerSet 1 | ||
+ | DHCPEntry 253 | ||
+ | PoeSvrCnt 4 | ||
+ | ScheduleSet 12 | ||
+ | AclBuffer 1 | ||
+ | IPSecManualSA 120 | ||
+ | IPSecIkePeer 120 | ||
+ | IPSecIkeSA 120 | ||
+ | IPSecAclBuffer 1 | ||
+ | IPSecSPD 120 | ||
+ | NatAclBuffer 1 | ||
+ | CustomPort 10 | ||
+ | NatSessions 1024 | ||
+ | IpPolicySet 12 | ||
+ | PoeSvrCnt 0 | ||
+ | ScheduleSet 0 | ||
+ | MiscFirewallBuffer 1 | ||
+ | AveBuffer 1 | ||
+ | CyberPatrolBuffer 1 | ||
+ | CyberPatrolListBuffer 1 | ||
+ | TrustedIPNum 0 | ||
+ | IPBUFixpart 1 | ||
+ | NatRulePerSet 12 | ||
+ | DHCPMacNum 8 | ||
+ | UPNPNum 1 | ||
+ | IPSecExtendNum 120 | ||
+ | Model 2 29698 29954 | ||
+ | CoeFixedPart | ||
+ | CbqSpecialClass | ||
+ | AccessSecHost 16 | ||
+ | SwitchStpPort | ||
+ | Switch1QPort | ||
+ | Switch1QStaticEntry | ||
+ | WebManagementUser 5 | ||
+ | snmpManager | ||
+ | dot1xProfileEntry | ||
+ | swStaticMacEntry | ||
+ | swFilterEntry | ||
+ | swMirrorEntry | ||
+ | swBWEntry | ||
+ | swTrunkEntry | ||
+ | bcastDmEntry | ||
+ | CMMemberEntry | ||
+ | swDSMarkEntry | ||
+ | OSPFArea | ||
+ | OSPFVL | ||
+ | VrrpRouterEntry 0 | ||
+ | swClassifierEntry | ||
+ | swFilterActionEntry 256 | ||
+ | sptFSGen 128 1024 | ||
+ | genBuffer 1 | ||
+ | rmonEventTable 64 | ||
+ | rmonAlarmTable 64 | ||
+ | l2InbandIpdrvIfEntry | ||
+ | IGMPMVREntry 5 | ||
+ | IGMPMVRAddrEntry 261 | ||
+ | IGMPFilteringPort 52 | ||
+ | IGMPFilteringRecEntry 256 | ||
+ | SyslogTypeEntry 5 | ||
+ | SyslogServerEntry | ||
+ | swPBVlanEntry | ||
+ | swVlanProtoBasedEntry 364 | ||
+ | cardTypeEntry | ||
+ | swMRStpEntry | ||
+ | radiusServer | ||
+ | SwitchMRStpPort 52 | ||
+ | IGMPMVlanEntry 16 | ||
+ | swVlanSubnetBasedEntry 16 | ||
+ | TrTCMEntry 52 | ||
+ | tacPlusAuthSvr 2 | ||
+ | tacPlusAcctSvr 2 | ||
+ | enablePassword 15 | ||
+ | authTypeEntry 2 | ||
+ | acctTypeEntry 4 | ||
+ | dhcpSnpEntry 1 | ||
+ | arpInspectEntry 1 | ||
+ | ipSrcGuardEntry 512 | ||
+ | authorTypeEntry 2 | ||
+ | SnmpManagementUser 5 | ||
+ | displayConf 1 | ||
+ | FwVersion | ||
+ | FwVersion0 | ||
+ | FwVersion1 | ||
+ | |||
+ | OK | ||
+ | |||
+ | </ | ||
+ | In the above sequence, the second stage ZynOS loader was interrupted by pressing a key. In order to get into the initial U-Boot, the " | ||
+ | < | ||
+ | XS1930$ flshow | ||
+ | =============== FLASH Partition Layout =============== | ||
+ | Index Name | ||
+ | ------------------------------------------------------ | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | ====================================================== | ||
+ | |||
+ | XS1930$ gobootext # starts the second stage ZynOS bootloader | ||
+ | </ | ||
+ | The unlocked U-Boot allows disabling autoboot of the second stage. The flash layout is also found in the memory layout information obtained by the atmp command in the ZynOS bootloader. | ||
+ | |||
+ | The Flash chip can be read out via a SOIC-clamp when the device is off. After splitting the image into the partitions, the ZynOS kernel and all the user-land code sit in | ||
+ | < | ||
+ | $ hd 16_RasCode.bin|head | ||
+ | 00000000 | ||
+ | 00000010 | ||
+ | 00000020 | ||
+ | 00000030 | ||
+ | 00000040 | ||
+ | 00000050 | ||
+ | 00000060 | ||
+ | 00000070 | ||
+ | 00000080 | ||
+ | 00000090 | ||
+ | |||
+ | |||
+ | 0a: 01f06778 Length (uncompressed) | ||
+ | 0e: 003c2dc9 Length | ||
+ | 14: 6f84 Checksum (before uncompression) | ||
+ | 18: e874 Other Checksum | ||
+ | </ | ||
+ | You can compare the header informtion in the first 0x30 bytes with the output of ATMP in the ZynOS bootloader to identify some data fields. The image is lzma compressed, but there seem to be some trailer that cannot be decompressed with standard tools, nevertheless the RAM image can be obtained by: | ||
+ | < | ||
+ | $ dd if=16_RasCode.bin bs=16 skip=3 of=16_RasCode_headerless.bin | ||
+ | $ mv 16_RasCode_headerless.bin 16_RasCode_headerless.lzma | ||
+ | $ xz -c -d 16_RasCode_headerless.lzma > | ||
+ | </ | ||
+ | You can directly load RasCode_image.bin into a disassembler at memory location 0x80274000 for analysis (see above: 2: RasCode(RAMCODE), | ||
+ | |||
+ | ===== OpenWrt ===== | ||
+ | A very initial boot of OpenWrt looks like this: | ||
+ | < | ||
+ | [ 0.000000] Calling smp_setup_processor_id | ||
+ | [ 0.000000] Calling boot_cpu_init | ||
+ | [ 0.000000] Linux version 5.4.70 (birger@AMDDesktop) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r14727-627da9a38c)) #0 Thu Oct 29 18:33:33 2020 | ||
+ | [ 0.000000] prom_init called | ||
+ | [ 0.000000] RTL838X model is 0 | ||
+ | [ 0.000000] RTL839X model is 0 | ||
+ | [ 0.000000] RTL93XX model is 93130001 | ||
+ | [ 0.000000] SoC Type: RTL9313 | ||
+ | [ 0.000000] Kernel command line: | ||
+ | [ 0.000000] printk: bootconsole [early0] enabled | ||
+ | [ 0.000000] CPU0 revision is: 0001a120 (MIPS interAptiv (multi)) | ||
+ | [ 0.000000] plat_mem_setup called | ||
+ | [ 0.000000] MIPS: machine is Zyxel XS1900-10 | ||
+ | [ 0.000000] Registering _machine_restart | ||
+ | [ 0.000000] NO PCI device found | ||
+ | [ 0.000000] Initrd not found or empty - disabling initrd | ||
+ | [ 0.000000] device_tree_init called | ||
+ | [ 0.000000] Using appended Device Tree. | ||
+ | [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
+ | [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
+ | [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
+ | [ 0.000000] Zone ranges: | ||
+ | [ 0.000000] | ||
+ | [ 0.000000] Movable zone start for each node | ||
+ | [ 0.000000] Early memory node ranges | ||
+ | [ 0.000000] | ||
+ | [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] | ||
+ | [ 0.000000] On node 0 totalpages: 32768 | ||
+ | [ 0.000000] | ||
+ | [ 0.000000] | ||
+ | [ 0.000000] | ||
+ | [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 | ||
+ | [ 0.000000] pcpu-alloc: [0] 0 | ||
+ | [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480 | ||
+ | [ 0.000000] Kernel command line: console=ttyS0, | ||
+ | [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) | ||
+ | [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) | ||
+ | [ 0.000000] Writing ErrCtl register=00000000 | ||
+ | [ 0.000000] Readback ErrCtl register=00000000 | ||
+ | [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off | ||
+ | [ 0.000000] Memory: 114840K/ | ||
+ | [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, | ||
+ | [ 0.000000] NR_IRQS: 64 | ||
+ | [ 0.000000] Found Interrupt controller: cpuintc (cpuintc) | ||
+ | [ 0.000000] ICU Memory: b8003000 | ||
+ | [ 0.000000] random: get_random_bytes called from start_kernel+0x398/ | ||
+ | [ 0.000000] CPU frequency from device tree: 700000000 | ||
+ | [ 0.000000] CPU Clock: 700 MHz | ||
+ | [ 0.000000] PLL control register: 0 | ||
+ | [ 0.000000] Found NS16550a: uart (uart@b8002000) | ||
+ | [ 0.000000] Using default baud rate: 38400 | ||
+ | b[ 0.000000] clocksource: | ||
+ | [ 0.000011] sched_clock: | ||
+ | [ 2.733736] printk: console [ttyS0] enabled | ||
+ | [ 2.733736] printk: console [ttyS0] enabled | ||
+ | [ 4.214661] printk: bootconsole [early0] disabled | ||
+ | [ 4.214661] printk: bootconsole [early0] disabled | ||
+ | [ 5.880845] Calibrating delay loop... 464.38 BogoMIPS (lpj=928768) | ||
+ | [ 5.918555] pid_max: default: 32768 minimum: 301 | ||
+ | [ 5.926097] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
+ | [ 5.937684] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
+ | [ 5.956103] clocksource: | ||
+ | [ 5.971604] futex hash table entries: 256 (order: -1, 3072 bytes, linear) | ||
+ | [ 5.982629] pinctrl core: initialized pinctrl subsystem | ||
+ | [ 5.991980] NET: Registered protocol family 16 | ||
+ | [ 5.999926] cpuidle: using governor ladder | ||
+ | [ 6.053678] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512 | ||
+ | [ 6.074570] clocksource: | ||
+ | [ 6.084551] NET: Registered protocol family 2 | ||
+ | [ 6.092686] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear) | ||
+ | [ 6.106015] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
+ | [ 6.118152] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
+ | [ 6.129314] TCP: Hash tables configured (established 1024 bind 1024) | ||
+ | [ 6.139640] UDP hash table entries: 256 (order: 0, 4096 bytes, linear) | ||
+ | [ 6.150064] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear) | ||
+ | [ 6.161582] NET: Registered protocol family 1 | ||
+ | [ 6.623572] workingset: timestamp_bits=14 max_order=15 bucket_order=1 | ||
+ | [ 6.642136] squashfs: version 4.0 (2009/ | ||
+ | [ 6.651435] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. | ||
+ | [ 6.701133] Probing RTL838X GPIOs | ||
+ | [ 6.706472] Unknown GPIO chip id (9313) | ||
+ | [ 6.763285] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled | ||
+ | [ 6.773669] serial8250: ttyS0 at MMIO 0x0 (irq = 0, base_baud = 12442400) is a 16550A | ||
+ | [ 6.787719] b8002100.uart: | ||
+ | [ 7.029159] brd: module loaded | ||
+ | [ 7.034875] Initializing rtl838x_nor_driver | ||
+ | [ 7.041589] SPI resource base is b8001200 | ||
+ | [ 7.047936] Address mode is 3 bytes | ||
+ | [ 7.053441] rtl838x_nor_init called | ||
+ | [ 7.060984] rtl838x-nor b8001200.spi: | ||
+ | [ 7.070668] 7 fixed-partitions partitions found on MTD device rtl838x_nor | ||
+ | [ 7.081412] Creating 7 MTD partitions on " | ||
+ | [ 7.089693] 0x000000000000-0x000000040000 : " | ||
+ | [ 7.099307] 0x000000040000-0x000000050000 : " | ||
+ | [ 7.109428] 0x000000050000-0x000000060000 : " | ||
+ | [ 7.119797] 0x000000060000-0x000000160000 : " | ||
+ | [ 7.129070] 0x000000160000-0x000000260000 : " | ||
+ | [ 7.138489] 0x000000260000-0x000000930000 : " | ||
+ | [ 7.168966] 0x000000930000-0x000001000000 : " | ||
+ | [ 7.179185] Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011) | ||
+ | [ 7.196034] libphy: Fixed MDIO Bus: probed | ||
+ | [ 7.202776] Probing RTL838X switch device | ||
+ | [ 7.209210] Chip-Info: 0 | ||
+ | [ 7.213223] Chip version A | ||
+ | [ 7.217499] In rtl838x_mdio_probe | ||
+ | [ 7.222783] Found compatible MDIO node! | ||
+ | [ 7.228843] Deferring probe of mdio bus | ||
+ | [ 7.235606] Probing RTL838X eth device pdev: 87c6c200, dev: 87c6c210 | ||
+ | [ 7.267380] Found SoC ID: 9313: RTL9313, family 9310 | ||
+ | [ 7.275232] rtl8380_init_mac | ||
+ | [ 7.279842] rtl838x-eth bb00a300.ethernet (unnamed net_device) (uninitialized): | ||
+ | [ 7.296077] In rtl838x_set_mac_hw | ||
+ | [ 7.301315] Using MAC 0000d2270eff996a | ||
+ | [ 7.307244] Using MAC 0000d2270eff996a | ||
+ | [ 7.313159] rtl838x_mdio_init called | ||
+ | [ 7.319118] libphy: rtl839x-eth-mdio: | ||
+ | [ 7.706251] In rtl838x_validate | ||
+ | [ 7.711393] In rtl838x_validate | ||
+ | [ 7.716632] i2c /dev entries driver | ||
+ | [ 7.724338] NET: Registered protocol family 10 | ||
+ | [ 7.740036] Segment Routing with IPv6 | ||
+ | [ 7.746079] NET: Registered protocol family 17 | ||
+ | [ 7.753816] 8021q: 802.1Q VLAN Support v1.8 | ||
+ | [ 7.761510] Probing RTL838X switch device | ||
+ | [ 7.767996] Chip-Info: 0 | ||
+ | [ 7.772015] Chip version A | ||
+ | [ 7.776292] In rtl838x_mdio_probe | ||
+ | [ 7.781572] Found compatible MDIO node! | ||
+ | [ 7.891354] rtl838x-switch: | ||
+ | [ 7.927723] Freeing unused kernel memory: 8732K | ||
+ | [ 7.934917] This architecture does not have kernel memory protection. | ||
+ | [ 7.945087] Run /init as init process | ||
+ | [ 8.075879] init: Console is alive | ||
+ | [ 8.117882] kmodloader: loading kernel modules from / | ||
+ | [ 8.133249] kmodloader: done loading kernel modules from / | ||
+ | [ 8.159197] init: - preinit - | ||
+ | [ 8.475963] random: jshn: uninitialized urandom read (4 bytes read) | ||
+ | [ 8.573223] random: jshn: uninitialized urandom read (4 bytes read) | ||
+ | ls: / | ||
+ | [ 8.713165] random: jshn: uninitialized urandom read (4 bytes read) | ||
+ | Press the [f] key and hit [enter] to enter failsafe mode | ||
+ | Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level | ||
+ | |||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | Please press Enter to activate this console. | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | [ | ||
+ | |||
+ | |||
+ | |||
+ | BusyBox v1.31.1 () built-in shell (ash) | ||
+ | |||
+ | _______ | ||
+ | | ||
+ | | ||
+ | | ||
+ | |__| W I R E L E S S F R E E D O M | ||
+ | | ||
+ | | ||
+ | | ||
+ | === WARNING! ===================================== | ||
+ | There is no root password defined on this device! | ||
+ | Use the " | ||
+ | in order to prevent unauthorized SSH logins. | ||
+ | -------------------------------------------------- | ||
+ | root@OpenWrt:/# | ||
+ | system type : RTL9313 | ||
+ | machine | ||
+ | processor | ||
+ | cpu model : MIPS interAptiv (multi) V2.0 | ||
+ | BogoMIPS | ||
+ | wait instruction | ||
+ | microsecond timers | ||
+ | tlb_entries | ||
+ | extra interrupt vector | ||
+ | hardware watchpoint | ||
+ | isa : mips1 mips2 mips32r1 mips32r2 | ||
+ | ASEs implemented | ||
+ | Options implemented | ||
+ | shadow register sets : 1 | ||
+ | kscratch registers | ||
+ | package | ||
+ | core : 0 | ||
+ | VCED exceptions | ||
+ | VCEI exceptions | ||
+ | root@OpenWrt:/# | ||
+ | | ||
+ | 2: 0 MIPS | ||
+ | 3: 0 MIPS | ||
+ | 4: 0 MIPS | ||
+ | 5: 0 MIPS | ||
+ | 6: 0 MIPS | ||
+ | 7: 0 MIPS | ||
+ | ERR: 0 | ||
+ | </ |