longan feature SCHEDULING_QUEUE_MANAGEMENT
Registers
Offset | Name | Summary |
---|---|---|
SCHEDULING_QUEUE_MANAGEMENT | ||
3d48 | SCHED_PORT_Q_CTRL_SET0 | |
3d68 | DMY_REG0_PER_PORT_TXQ_REG_24P | |
7a9c | SCHED_PORT_ALGO_CTRL | |
7aa0 | DMY_REG2_EGRESS_CTRL | |
7f44 | SCHED_CPU_Q_CTRL | |
a320 | QM_INTPRI2QID_CTRL | |
a324 | QM_CPUQID2QID_CTRL | |
a334 | QM_CPUQID2XGQID_CTRL | |
a344 | QM_RSN2CPUQID_CTRL_0 | |
a348 | QM_RSN2CPUQID_CTRL_1 | |
a34c | QM_RSN2CPUQID_CTRL_2 | |
a350 | QM_RSN2CPUQID_CTRL_3 | |
a354 | QM_RSN2CPUQID_CTRL_4 | |
a358 | QM_RSN2CPUQID_CTRL_5 | |
a35c | QM_RSN2CPUQID_CTRL_6 | |
a360 | QM_RSN2CPUQID_CTRL_7 | |
a364 | QM_RSN2CPUQID_CTRL_8 | |
a368 | QM_FLAG2CPUQID_CTRL_0 | |
a36c | QM_FLAG2CPUQID_CTRL_1 | |
a370 | DMY_REG0_QUEUE | |
e860 | SCHED_PORT_Q_CTRL_SET1 | |
e920 | DMY_REG0_PORT_TXQ_REG_4P | |
e924 | DMY_REG1_PORT_TXQ_REG_4P | |
e928 | DMY_REG2_PORT_TXQ_REG_4P | |
e92c | DMY_REG3_PORT_TXQ_REG_4P |