Realtek switch SoC docs

longan register: MAC_DRF_PAUSE

Details

Name
MAC_DRF_PAUSE
Offset
3ac0
Feature
BIST_BISR

Fields

Name LSB Bits Description
RESERVED 20 12
LBRXF_DRF_PAUSE_PG08 19 1
DMY_DRF_PAUSE_PG08 18 1
GTXF1_DRF_PAUSE_PG08 17 1
GRXF1_DRF_PAUSE_PG08 16 1
TGTXF_DRF_PAUSE_PG07_04 12 4
TGTXF_DRF_PAUSE_PG02 11 1
TGRXF_DRF_PAUSE_PG07_04 7 4
TGRXF_DRF_PAUSE_PG02 6 1
GTXF0_DRF_PAUSE_PG02_00 3 3
GRXF_DRF_PAUSE0_PG02_00 0 3