Realtek switch SoC docs

longan feature BIST_BISR

Registers

Offset Name Summary
BIST_BISR
3a60 MAC_BIST_MODE
3a64 MAC_DRF_BIST_MODE
3a68 MAC_BIST_RSTN
3a6c MAC_DRF_TEST_RESUME
3a70 MAC_GRXF0_RESULT
3a7c MAC_GTXF0_RESULT
3a88 MAC_TGRXF_RESULT
3a9c MAC_TGTXF_RESULT
3ab0 MAC_GRXF1_RESULT0
3ab4 MAC_GTXF1_RESULT0
3ab8 MAC_DMY_RESULT
3abc MAC_LBRXF_RESULT
3ac0 MAC_DRF_PAUSE
3ac4 MAC_GRXF0_GTXF0_SRAM_LS_EN
3ad0 MAC_GRXF0_GTXF0_TIMING_CFG_EN
3adc MAC_GRXF0_RMA
3ae8 MAC_GRXF0_RMB
3af4 MAC_GTXF0_RMA
3b00 MAC_GTXF0_RMB
3b0c MAC_TGRXF_TGTXF_SRAM_LS_EN
3b20 MAC_TGRXF_TGTXF_TIMING_CFG_EN
3b34 MAC_TGRXF_RMA
3b48 MAC_TGRXF_RMB
3b5c MAC_TGTXF_RMA
3b70 MAC_TGTXF_RMB
3b84 MAC_GRXF1_GTXF1_SRAM_LS_EN
3b88 MAC_GRXF1_GTXF1_TIMING_CFG_EN
3b8c MAC_GRXF1_RMA
3b90 MAC_GRXF1_RMB
3b94 MAC_GTXF1_RMA
3b98 MAC_GTXF1_RMB
3b9c MAC_DMY_SRAM_LS_EN
3ba0 MAC_DMY_TIMING_CFG_EN
3ba4 MAC_DMY_RMA
3ba8 MAC_DMY_RMB
3bac MAC_LBRXF_SRAM_LS_EN
3bb0 MAC_LBRXF_TIMING_CFG_EN
3bb4 MAC_LBRXF_RMA
3bb8 MAC_LBRXF_RMB
3bbc DMY_REG0_MAC_BIST
7860 EGR_BIST_CTRL0
7864 EGR_BIST_CTRL1
7868 EGR_BIST_RSLT0
786c EGR_BIST_RSLT1
7870 EGR_BIST_RSLT2
7874 EGR_BIST_RSLT3
7878 EGR_BIST_RSLT4
787c EGR_SRAM_CTRL
aa20 ALE_BIST_MODE0
aa24 ALE_BIST_MODE1
aa28 ALE_DRF_BIST_MODE0
aa2c ALE_DRF_BIST_MODE1
aa30 ALE_DRF_BIST_RESUME0
aa34 ALE_DRF_BIST_RESUME1
aa38 ALE_TIMING_CFG0
aa3c ALE_TIMING_CFG1
aa40 ALE_TIMING_CFG2
aa44 ALE_TIMING_CFG3
aa48 ALE_RM_0
aa4c ALE_RM_1
aa50 ALE_RM_2
aa54 ALE_RM_3
aa58 ALE_RM_4
aa5c ALE_RM_5
aa60 ALE_RM_6
aa64 ALE_RM_7
aa68 ALE_RM_8
aa6c ALE_RM_9
aa70 ALE_RM_10
aa74 ALE_RM_11
aa78 ALE_RM_12
aa7c ALE_RM_13
aa80 ALE_RM_14
aa84 ALE_RM_15
aa88 ALE_CAM_TIMING_MDS_0
aa8c ALE_CAM_TIMING_MDS_1
aa90 ALE_CAM_TIMING_MDS_3
aa94 ALE_CAM_TIMING_MDS_4
aa98 ALE_CAM_TIMING_MDS_5
aa9c ALE_CAM_TIMING_MDS_2
aaa0 ALE_CAM_TIMING_RDS_0
aaa4 ALE_CAM_TIMING_RDS_1
aaa8 ALE_CAM_TIMING_RDS_2
aaac ALE_CAM_TIMING_RDS_3
aab0 ALE_CAM_TIMING_RDS_6
aab4 ALE_CAM_TIMING_RDS_7
aab8 ALE_CAM_TIMING_RDS_4
aabc ALE_CAM_TIMING_RDS_5
aac0 ALE_BIST_DONE0
aac4 ALE_BIST_DONE1
aac8 ALE_DRF_BIST_PAUSE0
aacc ALE_DRF_BIST_PAUSE1
aad0 ALE_BIST_FAIL0
aad4 ALE_BIST_FAIL1
aad8 ALE_BIST_FAIL2
aadc ALE_BIST_FAIL3
aae0 ALE_BIST_FAIL4
aae4 ALE_BIST_FAIL5
aae8 ALE_DRF_BIST_DONE0
aaec ALE_DRF_BIST_DONE1
aaf0 ALE_DRF_BIST_FAIL0
aaf4 ALE_DRF_BIST_FAIL1
aaf8 ALE_DRF_BIST_FAIL2
aafc ALE_DRF_BIST_FAIL3
ab00 ALE_DRF_BIST_FAIL4
ab04 ALE_DRF_BIST_FAIL5
ab08 ALE_BIST_LS_MODE
ab0c DMY_REG0_ALE_BIST
dc00 INGR_BIST_CTRL0
dc04 INGR_BIST_CTRL1
dc08 INGR_BIST_RSLT0
dc0c INGR_BIST_RSLT1
dc10 INGR_BIST_RSLT2
dc14 INGR_BIST_RSLT3
dc18 INGR_BIST_RSLT4
dc1c INGR_SRAM_CTRL
dc20 INGR_BISR_CTRL
dc24 INGR_BISR_RSLT0
dc28 INGR_BISR_RSLT1
e100 CHIP_BIST_MODE
e104 CHIP_DRF_BIST_MODE
e108 CHIP_BIST_RSTN
e10c CHIP_DRF_TEST_RESUME
e110 CHIP_BIST_DONE
e114 CHIP_DRF_BIST_DONE
e118 CHIP_BIST_FAIL
e11c CHIP_DRF_BIST_FAIL
e120 CHIP_DRF_START_PAUSE
e124 CHIP_ALL_RESULT
e128 CHIP_SRAM_LS
e12c SOC_BIST_CTRL0
e130 SOC_BIST_CTRL1
e134 SOC_BIST_CTRL2
e138 SOC_BIST_CTRL3
e13c SOC_BIST_CTRL4
e140 SOC_BIST_CTRL5
e144 SOC_BIST_CTRL6
e148 SOC_BIST_RSTL0
e14c SOC_BIST_RSTL1
e150 SOC_BIST_RSTL2
e154 SOC_BIST_RSTL3
e158 SOC_BIST_MISC0
e168 SOC_BIST_MISC1
e178 DMY_REG0_CHIP_BIST