longan register: SMI_ACCESS_PHY_CTRL_0
Details
- Name
- SMI_ACCESS_PHY_CTRL_0
- Offset
- cb70
- Feature
- MAC_CONTROL
Description
PHY port select and PHY broadcast control register 0
default: 0x0000_0000
Fields
| Name | LSB | Bits | Description |
|---|---|---|---|
| RESERVED | 29 | 3 |
|
| PHY_BRDCAST | 28 | 1 |
Enable PHY broadcast option Note, that if this flag is raised, PHY_MASK is shortened to [4:0] and sets the broadcast address instead.
|
| PHY_MASK | 0 | 28 |
Port selection for PHY One port per bit, e.g. BIT(0) writes the MDIO message to port/phy/address 0. Can we write to 2 phy’s at the same time with (BIT(0) | BIT(1))? Note, this register is only valid during writing commands (RWOP = 1 in SMI_ACCESS_PHY_CTRL_1).
|