Realtek switch SoC docs

mango register: PROT_SERDSE_MUX_CTRL_1

Details

Name
PROT_SERDSE_MUX_CTRL_1
Offset
13c0
Feature
MAC_CONTROL

Description

MAC port mux setup

Fields

Name LSB Bits Description
RESERVED 22 10

Serdes 9 channel 0

  • 0b0: Port 50
  • 0b1: Port 42
SERDES9_0_GMII_SEL 21 1

Serdes 7 channel 3

  • 0b0: Port 43
  • 0b1: Port 45
SERDES7_3_GMII_SEL 20 1

Serdes 7 channel 2

  • 0b0: Port 42
  • 0b1: Port 44
SERDES7_2_GMII_SEL 19 1

SerdeS 7 channel 2

  • 0b0: Port 42
  • 0b1: Port 44
SERDES6_3_GMII_SEL 18 1

SerdeS 6 channel 3

  • 0b0: Port 35
  • 0b1: Port 37
SERDES6_2_GMII_SEL 17 1

SerdeS 6 channel 2

  • 0b0: Port 34
  • 0b1: Port 36
SERDES5_3_GMII_SEL 16 1

SerdeS 5 channel 3

  • 0b0: Port 27
  • 0b1: Port 29
SERDES5_2_GMII_SEL 15 1

SerdeS 5 channel 2

  • 0b0: Port 26
  • 0b1: Port 28
SERDES4_3_GMII_SEL 14 1

SerdeS 4 channel 3

  • 0b0: Port 19
  • 0b1: Port 21
SERDES4_2_GMII_SEL 13 1

SerdeS 4 channel 2

  • 0b0: Port 18
  • 0b1: Port 20
SERDES3_3_GMII_SEL 11 2

SerdeS 3 channel 3

  • 0x0: Port 11
  • 0x1: Port 15
  • 0x2: Port 13
  • 0x3: Reserved
SERDES3_2_GMII_SEL 9 2

SerdeS 3 channel 2

  • 0x0: Port 10
  • 0x1: Port 14
  • 0x2: Port 12
  • 0x3: Reserved
SERDES3_1_GMII_SEL 8 1

SerdeS 3 channel 1

  • 0b0: Port 09
  • 0b1: Port 13
SERDES3_0_GMII_SEL 7 1

SerdeS 3 channel 0

  • 0b0: Port 08
  • 0b1: Port 12
SERDES2_3_GMII_SEL 5 2

SerdeS 2 channel 3

  • 0x0: Port 03
  • 0x1: Port 11
  • 0x2: Port 05
  • 0x3: Reserved
SERDES2_2_GMII_SEL 3 2

SerdeS 2 channel 2

  • 0x0: Port 02
  • 0x1: Port 10
  • 0x2: Port 04
  • 0x3: Reserved
SERDES2_1_GMII_SEL 2 1

SerdeS 2 channel 1

  • 0b0: Port 01
  • 0b1: Port 09
SERDES2_0_GMII_SEL 1 1

SerdeS 2 channel 0

  • 0b0: Port 00
  • 0b1: Port 08
P50_GMII_SEL 0 1

Port 50 GMII Selection

  • 0b0: SerDeS 9 Channel 0
  • 0b1: SerDeS 8 Channel 2