|
MAC_CONTROL
|
|---|
| 0c00 |
SMI_INDRT_ACCESS_CTRL_0 |
|
| 0c04 |
SMI_INDRT_ACCESS_CTRL_1 |
|
| 0c08 |
SMI_INDRT_ACCESS_CTRL_2 |
|
| 0c10 |
SMI_INDRT_ACCESS_CTRL_3 |
|
| 0c14 |
SMI_INDRT_ACCESS_BC_PHYID_CTRL |
|
| 0c18 |
SMI_INDRT_ACCESS_MMD_CTRL |
|
| 0c1c |
SMI_DBG_CTRL |
|
| 0c20 |
MDXDBG_SEL0 |
|
| 0c24 |
MDXDBG_SEL1 |
|
| 0c28 |
MDXDBG_SEL2 |
|
| 0c2c |
MDXDBG_SEL3 |
|
| 0c30 |
MDXDBG_SEL4 |
|
| 0c34 |
MDXDBG_SEL5 |
|
| 0c38 |
MDXDBG_TSET |
|
| 0c3c |
MDXDBG_READ_DATA |
|
| 0c40 |
MDX_DBGMUX_SEL_1 |
|
| 0c44 |
MDX_DBGMUX_SEL_2 |
|
| 0c48 |
MDX_DBGMUX_SEL_3 |
|
| 0c4c |
MDX_DBG_DT_0 |
|
| 0c50 |
MDX_DBG_DT_1 |
|
| 0c54 |
MDX_DBG_DT_2 |
|
| 0c58 |
MDX_DBG_DT_3 |
|
| 0c5c |
MDX_DBG_DT_4 |
|
| 0c60 |
MDX_DBG_DT_5 |
|
| 0c64 |
MDX_DBG_DT_6 |
|
| 0c68 |
MDX_DBG_DT_7 |
|
| 0c6c |
MDX_DBG_OUT_CUR |
|
| 0c70 |
MDX_DBG_OUT |
|
| 0c74 |
SMI_PORT_ADDR_CTRL |
|
| 0c9c |
SMI_PORT_POLLING_SEL |
|
| 0cac |
SMI_PHY_ABLTY_GET_SEL |
|
| 0cbc |
SMI_GLB_CTRL1 |
|
| 0cc0 |
SMI_GLB_CTRL0 |
|
| 0cc4 |
SMI_BYPASS_ABLTY_LOCK_CTRL |
|
| 0ccc |
SMI_PORT_POLLING_CTRL |
|
| 0cd4 |
TX_IDLE_TMR_CTRL |
|
| 0cd8 |
LINK_DELAY_CTRL |
|
| 0cdc |
MDIO_FREE_CNT_CTRL |
|
| 0ce0 |
SMI_GPHY_RLFD_POLLING_SEL |
|
| 0ce4 |
SMI_RLFD_POLLING_BIT_SEL |
|
| 0ce8 |
SMI_10GPHY_RLFD_POLLING_SEL |
|
| 0cec |
SMI_GPHY_POLLING_SEL |
|
| 0cf0 |
SMI_10GPHY_POLLING_SEL0 |
|
| 0cf4 |
SMI_10GPHY_POLLING_SEL1 |
|
| 0cf8 |
SMI_10GPHY_POLLING_SEL2 |
|
| 0cfc |
SMI_10GPHY_POLLING_SEL3 |
|
| 0d00 |
SMI_10GPHY_POLLING_SEL4 |
|
| 0d04 |
SMI_PHY_REG_CHK_CHK0_MSK |
|
| 0d0c |
SMI_PHY_REG_CHK_CHK1_MSK |
|
| 0d14 |
SMI_PHY_REG_CHK_CHK2_MSK |
|
| 0d1c |
SMI_PHY_REG_CHK_CHK3_MSK |
|
| 0d24 |
SMI_PHY_REG_CHK_CHK4_MSK |
|
| 0d2c |
SMI_PHY_REG_CHK0_CTRL |
|
| 0d30 |
SMI_PHY_REG_CHK0_MMD_ADDR |
|
| 0d34 |
SMI_PHY_REG_CHK1_CTRL |
|
| 0d38 |
SMI_PHY_REG_CHK1_MMD_ADDR |
|
| 0d3c |
SMI_PHY_REG_CHK2_CTRL |
|
| 0d40 |
SMI_PHY_REG_CHK2_MMD_ADDR |
|
| 0d44 |
SMI_PHY_REG_CHK3_CTRL |
|
| 0d48 |
SMI_PHY_REG_CHK3_MMD_ADDR |
|
| 0d4c |
SMI_PHY_REG_CHK4_CTRL |
|
| 0d50 |
SMI_PHY_REG_CHK4_MMD_ADDR |
|
| 0d54 |
SMI_PHY_REG_CHK0_DATA_GPHY |
|
| 0d58 |
SMI_PHY_REG_CHK1_DATA_GPHY |
|
| 0d5c |
SMI_PHY_REG_CHK2_DATA_GPHY |
|
| 0d60 |
SMI_PHY_REG_CHK3_DATA_GPHY |
|
| 0d64 |
SMI_PHY_REG_CHK4_DATA_GPHY |
|
| 0d68 |
SMI_PHY_REG_CHK0_DATA_10GPHY |
|
| 0d6c |
SMI_PHY_REG_CHK1_DATA_10GPHY |
|
| 0d70 |
SMI_PHY_REG_CHK2_DATA_10GPHY |
|
| 0d74 |
SMI_PHY_REG_CHK3_DATA_10GPHY |
|
| 0d78 |
SMI_PHY_REG_CHK4_DATA_10GPHY |
|
| 0d7c |
SMI_PHY_REG_CHK0_RESULT |
|
| 0d84 |
SMI_PHY_REG_CHK1_RESULT |
|
| 0d8c |
SMI_PHY_REG_CHK2_RESULT |
|
| 0d94 |
SMI_PHY_REG_CHK3_RESULT |
|
| 0d9c |
SMI_PHY_REG_CHK4_RESULT |
|
| 0da4 |
SMI_PHY_REG_CHK0_RESULT_ERR |
|
| 0dac |
SMI_PHY_REG_CHK1_RESULT_ERR |
|
| 0db4 |
SMI_PHY_REG_CHK2_RESULT_ERR |
|
| 0dbc |
SMI_PHY_REG_CHK3_RESULT_ERR |
|
| 0dc4 |
SMI_PHY_REG_CHK4_RESULT_ERR |
|
| 0dcc |
MAC_FORCE_MODE_CTRL |
|
| 0eb0 |
MAC_RLFD_EN |
|
| 0eb8 |
MAC_RLFD_STS |
|
| 0ec0 |
MAC_LINK_STS |
Link status as the MAC sees it. |
| 0ec8 |
MAC_LINK_MEDIA_STS |
|
| 0ed0 |
MAC_LINK_SPD_STS |
|
| 0ef0 |
MAC_LINK_DUP_STS |
|
| 0ef8 |
MAC_TX_PAUSE_STS |
|
| 0f00 |
MAC_RX_PAUSE_STS |
|
| 0f08 |
MAC_EEE_ABLTY |
|
| 0f10 |
MAC_MSTR_SLV_STS |
|
| 0f18 |
FEFI_STS |
|
| 0f20 |
FORCE_MAC_SPD |
|
| 0f28 |
SPD_FORCE_VAL |
|
| 0f48 |
SDS_ABLTY |
|
| 0f4c |
RXDV_H |
|
| 0f50 |
RXDV_L |
|
| 0f54 |
TX_IDLE_H |
|
| 0f58 |
TX_IDLE_L |
|
| 0f5c |
PHY_UNIDIR_H |
|
| 0f60 |
PHY_UNIDIR_L |
|
| 0f64 |
MACRX_DUPDET_H |
|
| 0f68 |
MACRX_DUPDET_L |
|
| 0f6c |
FRC_RXDV_H |
|
| 0f70 |
FRC_RXDV_L |
|
| 0f74 |
FRC_TX_IDLE_H |
|
| 0f78 |
FRC_TX_IDLE_L |
|
| 0f7c |
FRC_PHY_UNIDIR_H |
|
| 0f80 |
FRC_PHY_UNIDIR_L |
|
| 0f84 |
FRC_MACRX_DUPDET_H |
|
| 0f88 |
FRC_MACRX_DUPDET_L |
|
| 0f8c |
FRCV_RXDV_H |
|
| 0f90 |
FRCV_RXDV_L |
|
| 0f94 |
FRCV_TX_IDLE_H |
|
| 0f98 |
FRCV_TX_IDLE_L |
|
| 0f9c |
FRCV_PHY_UNIDIR_H |
|
| 0fa0 |
FRCV_PHY_UNIDIR_L |
|
| 0fa4 |
FRCV_MACRX_DUPDET_H |
|
| 0fa8 |
FRCV_MACRX_DUPDET_L |
|
| 1358 |
MAC_L2_GLOBAL_CTRL2 |
|
| 135c |
MAC_L2_ADDR_CTRL |
|
| 1364 |
MAC_CPU_TAG_ID_CTRL |
|
| 1368 |
MAC_L2_CPU_MAX_LEN_CTRL |
|
| 136c |
MAC_SERDES_MODE_CTRL |
|
| 13a4 |
MAC_GROUP0_1_CTRL |
|
| 13a8 |
MAC_GROUP2_3_CTRL |
|
| 13ac |
MAC_GROUP4_CTRL |
|
| 13b0 |
MAC_GROUP5_CTRL |
|
| 13b4 |
MAC_GROUP6_7_CTRL |
|
| 13b8 |
MAC_GROUP8_11_CTRL |
|
| 13bc |
PROT_SERDSE_MUX_CTRL_0 |
|
| 13c0 |
PROT_SERDSE_MUX_CTRL_1 |
|
| 13c4 |
FIB_UNIDIR_CTRL |
Fiber UniDirectional Control Register |
| 485c |
MAC_L2_CPU_CRC |
|
| 5548 |
MAC_L2_GLOBAL_CTRL1 |
|
| 554c |
MAC_L2_PADDING_SEL |
|
| 5550 |
MAC_GLB_CTRL |
|
| 5554 |
MAC_L2_PORT_MAX_LEN_CTRL |
|
| 5634 |
MAC_DBG_SEL_CTRL |
|
| 6000 |
MAC_L2_PORT_CTRL |
|
| 6004 |
MAC_PORT_CTRL |
|
| 6008 |
HALF_CHG_CTRL |
|