rtl83xx

RTL83xx series

Lightweight managed, or unmanaged switch chips.

Chip Codename Series CPU core Ports Comment References
8370 8051 8 GE, embedded phy
8376 8051 Up to 16 GE, 8 embedded PHY

Older SoCs, predating Maple and Cypress. Not supported.

Chip Codename Series CPU core Ports Comment References
8328M ESW RTL8328 FE
8328S ESW RTL8328 FE
8328L ESW RTL8328 FE?
8329M SSW RTL8389 FE?
8377M SSW RTL8389 FE
8389L SSW RTL8389 FE ?
8389M SSW RTL8389 FE ?

Single core MIPS 4KEc CPU, up to 28 ports.

Chip Codename Series CPU core Ports Comment References
8330M Maple RTL8380 MIPS 4KEc @ 500MHz Up to 8 FE, 2GE 8 internal PHYs, 2 Serdes Product page
8332M Maple RTL8380 MIPS 4KEc @ 500MHz Up to 24 FE, 4GE 8 internal PHYs, 4 Serdes Product page
Chip Codename Series CPU core Ports Comment References
8380M Maple RTL8380 MIPS 4KEc @ 500MHz 8 GE, 2 SFP 8 internal PHYs (8218b), 2 Serdes Product page
RTL8381M RTL8380 MIPS 4KEc @ 500MHz Up to 14 GE 8 internal, 2 SGMII, 1 QSGMII Product page
8382M Maple RTL8380 MIPS 4KEc @ 500MHz Up to 28 GE 8 internal, 2 SGMII, 1 QSGMII Product page
8382L Maple RTL8380 MIPS 4KEc @ 500MHz Unmanaged 8 internal GE PHYs, no SDRAM interface Product page

The following pinout is the RTL8380, but it's expected considering the identical chip dimensions that the pinout is identical for all 833x/838x.

Pin Mux 0 Mux 1 Mux 2
28JTAG_TCKGPIO13
29JTAG_TMSGPIO12
30JTAG_TDOGPIO10
31JTAG_TDIGPIO11
32JTAG_TRST#GPIO14
110GPIO03
111GPIO02
112GPIO01
113GPIO00SYS_LED
114RESET#
116SSPI_CS#UART1_RX
117SSPI_SOUART1_TX
118SSPI_SII2C_DAT
119SSPI_CLKI2C_CLK
120MDIO_MDC
121MDIO_MDIO
122LED_CLK
123LED_DAT
124UART0_TX
125UART0_RX
127SPI_CS#0
128SPI_SI/SIO0
129SPI_SO/SIO1
130SPI_CLK

RTL8380M Serdes

We have very limited information on these SerDes other then 'what is in the code' and what is in the block diagrams of the datasheets. Some salty grains are needed.

SerDes Switch Ports MII name Notes
- 0-7 internal
0 8-11 QSGMII
1 12-15 QSGMII
2 16 RSGMII
3 17 SGMII
- 18 internal CPU NIC

RTL8381M Serdes

We have very limited information on these SerDes other then 'what is in the code' and what is in the block diagrams of the datasheets. Some salty grains are needed.

SerDes Switch Ports MII name Notes
- 0-7 internal
0 8 SGMII
1 9 SGMII
2 10-13 QSGMII

RTL8382M Serdes

We have very limited information on these SerDes other then 'what is in the code' and what is in the block diagrams of the datasheets. Some salty grains are needed.

SerDes Switch Ports MII name Notes
0 0-3 QSGMII
1 3-7 QSGMII
- 8-15 Internal
2 16-19 QSGMII
3 20-23 QSGMII
4 24-25 QSGMII Can be combined with serdes 5
5 26-27 RSGMII Can be combined with serdes 4

Dual threaded (VPE) MIPS34Kc CPU, supporting up to 52 ports.

Chip Codename Series CPU core Ports Comment References
8351M Cypress RTL8390 MIPS 34Kc @ 700MHz Up to 24FE, 4GE No embedded PHY, 17.6 GBit switch cap Product page
8352M Cypress RTL8390 MIPS 34Kc @ 700MHz Up to 56 FE
8353M Cypress RTL8390 MIPS 34Kc @ 700MHz 48FE, 4 GE No embedded PHY, 17.6 GBit switch cap Product page
Chip Codename Series CPU core Ports Comment References
8391M Cypress RTL8390 MIPS 34Kc @ 700MHz 24x GE, 4x Combo GE/SFP No emb PHY 56GBit switch cap Product page
8392M Cypress RTL8390 MIPS 34Kc @ 700MHz 24x GE, (4x Combo GE/SFP or 2x SGMII/100Base-FX/1000Base-X) No emb PHY 56GBit switch cap Product page
8393M Cypress RTL8390 MIPS 34Kc @ 700MHz 48x GE, (4x Combo GE/SFP or 2x SGMII/100Base-FX/1000Base-X) No emb PHY 104GBit switch cap Product page
8396M Cypress RTL8390 MIPS 34Kc @ 700MHz 24x GE, 2x SFP+ No emb PHY 88GBit switch cap Product page
  • rtl83xx.txt
  • Last modified: 2022/12/30 15:47
  • by svanheule