cypress registers Registers Offset Name Summary INTERFACE 0000 ECO_DUMMY_CTRL 0004 MAC_IF_CTRL 0008 MAC_SERDES_IF_CTRL 0010 MAC_IO_DRIV_ABLTY RESET 0014 RST_GLB_CTRL 0018 RST_GLB_STS0 001c RST_GLB_STS1 0020 MAC_RST_DUR_CTRL PLL_BIAS 0024 PLL_GLB_CTRL 0028 CPU_PLL_CTRL0 002c CPU_PLL_CTRL1 0030 CPU_PLL_SSC_CTRL 0034 CPU_PLL_MISC_CTRL 0038 LXB_PLL_CTRL0 003c LXB_PLL_CTRL1 0040 LXB_PLL_SSC_CTRL 0044 LXB_PLL_MISC_CTRL 0048 MEM_PLL_CTRL0 004c MEM_PLL_CTRL1 0050 MEM_PLL_SSC_CTRL 0054 MEM_PLL_MISC_CTRL 0058 SW_PLL_CTRL 005c SW_PLL_MISC_CTRL 0060 BG_CTRL INTERRUPT 0064 IMR_GLB 0068 IMR_PORT_LINK_STS_CHG 0070 IMR_PORT_MEDIA_CHG 0078 IMR_PORT_FEFI 0080 IMR_PORT_EEE_CHG 0088 IMR_PORT_TIMESTAMP_LATCH 008c IMR_SERDES 0090 IMR_EXT_GPIO 0098 IMR_MISC 009c ISR_GLB_SRC 00a0 ISR_PORT_LINK_STS_CHG 00a8 ISR_PORT_MEDIA_CHG 00b0 ISR_PORT_FEFI 00b8 ISR_PORT_EEE_CHG 00c0 ISR_PORT_TIMESTAMP_LATCH 00c4 ISR_SERDES 00c8 ISR_EXT_GPIO 00d0 ISR_MISC 00d4 GPIO_INT_MODE LED 00e4 LED_GLB_CTRL Miscellaneous GPIO and LED controls. 00e8 LED_SET_2_3_CTRL Set the LED behaviour for LED sets 2 and 3. 00ec LED_SET_0_1_CTRL Set the LED behaviour for LED sets 0 and 1. 00f0 LED_COPR_SET_SEL_CTRL Copper port configuration set selection 0100 LED_FIB_SET_SEL_CTRL Fibre port configuration set selection 0110 LED_COPR_PMASK_CTRL Port mask for copper-enabled ethernet ports 0118 LED_FIB_PMASK_CTRL Port mask for fibre-enabled (SFP) ethernet ports 0120 LED_COMBO_CTRL Port mask for combo port mode selection. 0128 LED_SW_CTRL LED software configuration control. 012c LED_SW_P_EN_CTRL Port LED software control mask. 0144 LED_SW_P_CTRL Configure software controlled port LEDs. 0214 EXT_GPIO_DIR_CTRL 021c EXT_GPIO_DATA_CTRL 0224 EXT_GPIO_INDRT_ACCESS 0228 LED_LOAD_LV1_10G 022c LED_LOAD_LV2_10G 0230 LED_LOAD_LV3_10G 0234 LED_LOAD_LV1_1G 0238 LED_LOAD_LV2_1G 023c LED_LOAD_LV3_1G 0240 LED_LOAD_LV1_100M 0244 LED_LOAD_LV2_100M 0248 LED_LOAD_LV3_100M 024c LED_LOAD_LV1_10M 0250 LED_LOAD_LV2_10M 0254 LED_LOAD_LV3_10M 0258 LED_P_LOAD_CTRL 025c BUZZER_CTRL HW_MISC 0260 EFUSE_CMD 0264 EFUSE_WDATA 0268 EFUSE_RDATA 026c EFUSE_CTRL 0270 VOL_CTRL_RESIS 0274 TM0_CTRL_0 0278 TM0_CTRL_1 027c TM0_CTRL_2 0280 TM0_RESULT 0284 TM1_CTRL_0 0288 TM1_CTRL_1 028c TM1_CTRL_2 0290 TM1_RESULT 0294 SPD_SENR_CTRL 0298 SPD_DATA_IN_0 029c SPD_DATA_IN_1 02a0 SPD_DATA_OUT_0 02a4 SPD_DATA_OUT_1 MAC_CONTROL 02a8 MAC_GLB_CTRL 02ac MAC_EFUSE_CTRL 02b0 MAC_MAX_LEN_CTRL Set size limits for packets being switched. 02b4 MAC_ADDR_CTRL 02bc MAC_FORCE_MODE_CTRL 0390 MAC_LINK_STS Link status as the MAC sees it. 0398 MAC_LINK_MEDIA_STS 03a0 MAC_LINK_SPD_STS 03b0 MAC_LINK_DUP_STS 03b8 MAC_TX_PAUSE_STS 03c0 MAC_RX_PAUSE_STS 03c8 MAC_EEE_ABLTY 03d0 MAC_FEFI_STS 03d8 MAC_CPU_TAG_ID_CTRL 03dc PHYREG_ACCESS_CTRL 03e0 PHYREG_CTRL 03e4 PHYREG_PORT_CTRL 03ec BROADCAST_PHYID_CTRL 03f0 PHYREG_DATA_CTRL 03f4 PHYREG_MMD_CTRL 03f8 SMI_GLB_CTRL 03fc SMI_PORT_POLLING_CTRL 0404 CHG_DUP_CTRL 0408 MAC_LINK_500M_STS Flag to indicate if a MAC link port supports 500M or not. 0410 SMI_PORT_500M_POLLING_CTRL 0418 MAC_MISC_CTRL POWER_SAVING 041c EEE_TX_MINIFG_CTRL0 0420 EEE_TX_MINIFG_CTRL1 0424 EEE_TX_CTRL 0428 EEE_TX_TIMER_100M_CTRL 042c EEE_TX_TIMER_GELITE_CTRL 0430 EEE_TX_TIMER_GIGA_CTRL 0434 EEE_TX_TIMER_10G_CTRL 0438 EEE_EEEP_PORT_TX_STS 0440 EEE_EEEP_PORT_RX_STS 0448 EEEP_PORT_TX_EN_CTRL 0450 EEEP_PORT_RX_EN_CTRL 0458 EEEP_TIMER_UNIT_CTRL 045c EEEP_TX_100M_CTRL 0460 EEEP_TX_500M_CTRL 0464 EEEP_TX_GIGA_CTRL 0468 EEEP_TX_WAKE_TIMER_CTRL 046c EEEP_RX_RATE_100M_CTRL 0470 EEEP_RX_RATE_500M_CTRL 0474 EEEP_RX_RATE_GIGA_CTRL 0478 EEEP_RX_SLEEP_STEP_CTRL 047c EEEP_RX_TIMER_100M_CTRL 0480 EEEP_RX_TIMER_500M_CTRL0 0484 EEEP_RX_TIMER_500M_CTRL1 0488 EEEP_RX_TIMER_GIGA_CTRL0 048c EEEP_RX_TIMER_GIGA_CTRL1 0490 PS_GATCLK_SLCLK_CTRL 0494 PS_LINKID_GATCLK_CTRL 0498 PS_EEE_GATCLK_CTRL 049c PS_ACL_PWR_CTRL 04a0 EEEP_RX_IDLE_TIMER_CTRL 04a4 EEEP_TX_IDLE_TIMER_CTRL 04a8 EEEP_GBL_CTRL SYSTEM_CLOCK 04ac REF_TIME_SEC 04b0 REF_TIME_NSEC 04b4 REF_TIME_CTRL 04b8 REF_TIME_EN IEEE802_1Q_VLAN 04bc VLAN_TAG_TPID_CTRL STATISTIC_COUNTERS 04cc STAT_CTRL OAM 04d0 OAM_GLB_DYING_GASP_CTRL 04d4 DYING_GASP_POLARITY_CTRL DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 04d8 DBG_CTRL 04dc DBG_DATA_CTRL PLL_BIAS 0800 SW_PLL_SSC_CTRL 0804 CKREFBUF_CTRL CHP_INFORMATION 0ff0 MODEL_NAME_INFO 0ff4 CHIP_INFO NIC_DMA 1000 DMA_IF_PKT_FLTR_CTRL INGRESS_AND_EGRESS_ACL 1004 ACL_VLAN_CNVT_DFLT_ACT L3_ROUTING 100c ROUTING_EXCPT_CTRL ETHERNET_AV 1040 AVB_PORT_CLASS_A_EN 1048 AVB_PORT_CLASS_B_EN 1050 AVB_CTRL SPECIAL_TRAP 1054 SPCL_TRAP_CTRL 1058 SPCL_TRAP_IGMP_CTRL 105c SPCL_TRAP_EAPOL_CTRL 1060 SPCL_TRAP_ARP_CTRL When bit is set, traps all ARP request packets to the CPU-Port. 1064 SPCL_TRAP_IPV6_CTRL 1068 SPCL_TRAP_SWITCH_MAC_CTRL 106c SPCL_TRAP_SWITCH_IPV4_ADDR Defines the IPv4 interface address of the device. 1070 SPCL_TRAP_CRC_CTRL INGRESS_PRIORITY_DECISION 1080 PRI_SEL_IPRI_REMAP 1084 PRI_SEL_OPRI_DEI0_REMAP 1088 PRI_SEL_OPRI_DEI1_REMAP 108c PRI_SEL_DSCP_REMAP 10a8 PRI_SEL_PORT_PRI 10c0 PRI_SEL_PORT_TBL_IDX_CTRL 10d0 PRI_SEL_TBL_CTRL 10e0 PRI_SEL_CTRL 10e4 PRI_SEL_PORT_DEI_TAG_CTRL 10ec PRI_SEL_DEI2DP_REMAP 10f0 PRI_SEL_DSCP2DP_REMAP FLOWCONTROL_BACKPRESSURE_THRESHOLD 1100 FC_P_Q_EGR_DROP_EN 1108 FC_P_RXCNGST_IGNORE QUEUE_MANAGEMENT 1110 QM_INTPRI2QID_CTRL 1130 QM_PORT_QNUM 1148 QM_PKT2CPU_INTPRI_0 114c QM_PKT2CPU_INTPRI_1 1150 QM_PKT2CPU_INTPRI_2 1154 QM_PKT2CPU_INTPRI_MAP 1158 FC_EGR_DROP_CTRL TABLE_ACCESS 1180 TBL_ACCESS_L2_CTRL 1184 TBL_ACCESS_L2_DATA 1190 TBL_ACCESS_CTRL_0 1194 TBL_ACCESS_DATA_0 RMA 1200 RMA_CTRL_0 Configure actions for Reserved Multicast Addresses 01-80-C2-00-00-0x 1204 RMA_CTRL_1 Configure actions for Reserved Multicast Addresses 01-80-C2-00-00-1x 1208 RMA_CTRL_2 Configure actions for Reserved Multicast Addresses 01-80-C2-00-00-2x 120c RMA_CTRL_3 STP and VLAN bypass control for Reserved Multicast Addresses. 1210 RMA_SMAC_LRN_CTRL 1218 RMA_MGN_LRN_CTRL 121c RMA_USR_DEF_CTRL_SET0_0 1220 RMA_USR_DEF_CTRL_SET0_1 1224 RMA_USR_DEF_CTRL_SET1_0 1228 RMA_USR_DEF_CTRL_SET1_1 122c RMA_PORT_BPDU_CTRL 123c RMA_PORT_PTP_CTRL 124c RMA_PORT_LLDP_CTRL 125c RMA_BPDU_FLD_PMSK INGRESS_AND_EGRESS_ACL 1280 ACL_BLK_LOOKUP_CTRL 1288 ACL_CTRL Main control register of the Packet Inspection Engine 128c ACL_BLK_TMPLTE_CTRL 12d4 ACL_RESERVED 12ec ACL_BLK_GROUP_CTRL 12f0 ACL_BLK_RESULT_CTRL 12f4 ACL_MV_CTRL 12f8 ACL_MV_LEN_CTRL 12fc ACL_CLR_CTRL METER_MARKER 1300 METER_GLB_CTRL 1304 METER_MODE_CTRL 1308 METER_LB_TICK_TKN_CTRL 1348 METER_BYTE_DLB_LB_THR_CTRL 134c METER_BYTE_SRTCM_LB_THR_CTRL 1350 METER_BYTE_TRTCM_LB_THR_CTRL 1354 METER_PKT_DLB_LB_THR_CTRL 1358 METER_PKT_SRTCM_LB_THR_CTRL 135c METER_PKT_TRTCM_LB_THR_CTRL 1360 METER_LB_EXCEED_STS 13a0 METER_CNTR_CTRL 13a4 METER_GREEN_CNTR_STS 13a8 METER_YELLOW_CNTR_STS 13ac METER_RED_CNTR_STS 13b0 METER_TOTAL_CNTR_STS 13b4 METER_RATE_MODE_CTRL 13b8 METER_LB_GLB_EXCEED_STS PORT_ISOLATION_FORWARDING_FORCE_MODE 1400 PORT_ISO_CTRL BANDWIDTH_CONTROL_INGRESS_EGRESS 1600 IGR_BWCTRL_CTRL 1604 IGR_BWCTRL_LB_TICK_TKN_CTRL 160c IGR_BWCTRL_PORT_EXCEED_FLG 1614 IGR_BWCTRL_CTRL_LB_THR 1618 IGR_BWCTRL_PORT_CTRL_10G 1640 IGR_BWCTRL_PORT_CTRL STORM_CONTROL_B_M_UM_DLF 1800 STORM_CTRL_CTRL 1804 STORM_CTRL_LB_TICK_TKN_CTRL 180c STORM_CTRL_PORT_BC_EXCEED_FLG 1814 STORM_CTRL_PORT_MC_EXCEED_FLG 181c STORM_CTRL_PORT_UC_EXCEED_FLG 1824 STORM_CTRL_PORT_MC_TYPE_10G 1828 STORM_CTRL_PORT_UC_TYPE_10G 182c STORM_CTRL_PORT_BC_RATE_10G 1834 STORM_CTRL_PORT_MC_RATE_10G 183c STORM_CTRL_PORT_UC_RATE_10G 1844 STORM_CTRL_PORT_BC_BURST_10G 184c STORM_CTRL_PORT_MC_BURST_10G 1854 STORM_CTRL_PORT_UC_BURST_10G 185c STORM_CTRL_PORT_UC 19fc STORM_CTRL_PORT_MC 1b9c STORM_CTRL_PORT_BC 2000 STORM_CTRL_SPCL_LB_TICK_TKN_CTRL 2004 STORM_CTRL_SPCL_PORT_BPDU_EXCEED_FLG 200c STORM_CTRL_SPCL_PORT_IGMP_EXCEED_FLG 2014 STORM_CTRL_SPCL_PORT_ARP_EXCEED_FLG 201c STORM_CTRL_SPCL_PORT_RATE OAM 2100 OAM_CTRL 2104 OAM_PORT_ACT_CTRL LINK_AGGREGATION 2200 TRK_MBR_CTR 2280 TRK_HASH_IDX_CTRL 2284 TRK_HASH_CTRL 2294 TRK_SEP_TRAFFIC_CTRL 2298 TRK_EXTRA_EN_CTRL PORT_ISOLATION_FORWARDING_FORCE_MODE 2300 PORT_ISO_VB_CTRL 2304 PORT_ISO_VB_ISO_PM_CTRL SFLOW 2400 SFLOW_CTRL 2404 SFLOW_PORT_RATE_CTRL MIRRORING 2500 MIR_CTRL 2510 MIR_SPM_CTRL 2530 MIR_DPM_CTRL 2550 MIR_RSPAN_RX_TAG_RM_CTRL 2554 MIR_RSPAN_RX_TAG_EN_CTRL 2558 MIR_SAMPLE_RATE_CTRL IEEE802_1Q_VLAN 25c0 VLAN_PROFILE 2600 VLAN_PORT_ACCEPT_FRAME_TYPE 26d4 VLAN_CTRL 26d8 VLAN_PORT_PB_VLAN 27ac VLAN_PORT_FWD 27b4 VLAN_PORT_IGR_FLTR 27c4 VLAN_PORT_EGR_FLTR 27cc VLAN_IGR_CNVT_BLK_CTRL 27dc VLAN_PORT_NTO1_AGGR SPANNING_TREE 27e4 ST_CTRL IEEE802_1V_PROTOCOL_BASED_VLAN 2800 VLAN_PPB_VLAN_VAL 2820 VLAN_PORT_PPB_VLAN CFM 3000 CFM_UNKN_RX_CTRL 3004 CFM_LBLT_RX_CTRL 3008 CFM_CCM_RX_CTRL 300c CCM_LIFETIME_CTRL 3018 CCM_RX_INST_CTRL 3038 CCM_INST_CNTR_1 3058 CCM_INST_CNTR_0 3078 ETH_DM_PORT_EN 3080 ETH_DM_RX_CTRL 3084 ETH_DM_RX_TIME RANGE_CHECK_PORT_VLAN_IP_L4PORT 3400 RNG_CHK_SPM_CTRL 3480 RNG_CHK_DPM_CTRL 3500 RNG_CHK_VID_CTRL 3580 RNG_CHK_IP_CTRL 35a0 RNG_CHK_IP_RNG 35e0 RNG_CHK_L4PORT_CTRL 3600 RNG_CHK_L4PORT_RNG 3620 RNG_CHK_PKT_LEN_CTRL ADDRESS_TABLE_LOOKUP 3800 L2_CTRL_0 3804 L2_CTRL_1 3808 L2_PORT_LM_ACT 38dc L2_PORT_STTC_MV_ACT 38ec L2_FLD_PMSK 38f0 L2_PORT_NEW_SALRN 3900 L2_PORT_NEW_SA_FWD 3910 L2_LRN_CONSTRT 3914 L2_PORT_LRN_CONSTRT 39e8 L2_VLAN_LRN_CONSTRT 3ae8 L2_VLAN_LRN_CONSTRT_CNT 3b68 L2_VLAN_LRN_CONSTRT_ACT 3b6c L2_IGR_P_FLTR 3b74 L2_PORT_AGING_OUT 3b7c L2_IPV6_MC_IP_CARE_BYTE 3b80 L2_PORT_MV_ACT 3b90 L2_PORT_MV_INVALIDATE 3b98 L2_PORT_MV_FORBID ADDRESS_LEARNING_FLUSH 3ba0 L2_TBL_FLUSH_CTRL PARSER_HSB 3c00 HSB_CTRL 3c04 HSB_DATA0 3c08 HSB_DATA1 3c0c HSB_DATA2 3c10 HSB_DATA3 3c14 HSB_DATA4 3c18 HSB_DATA5 3c1c HSB_DATA6 3c20 HSB_DATA7 3c24 HSB_DATA8 3c28 HSB_DATA9 3c2c HSB_DATA10 3c30 HSB_DATA11 3c34 HSB_DATA12 3c38 HSB_DATA13 3c3c HSB_DATA14 3c40 HSB_DATA15 3c44 HSB_DATA16 3c48 HSB_DATA17 3c4c HSB_DATA18 3c50 HSB_DATA19 3c54 HSB_DATA20 3c58 HSB_DATA21 3c5c HSB_DATA22 3c60 HSB_DATA23 3c64 HSB_DATA24 3c68 HSB_DATA25 3c6c HSB_DATA26 3c70 HSB_DATA27 HSM 3c80 HSM_PRE_DATA0 3c84 HSM_PRE_DATA1 3c88 HSM_PRE_DATA2 3c8c HSM_PRE_DATA3 3c90 HSM_PRE_DATA4 3c94 HSM_PRE_DATA5 3c98 HSM_PRE_DATA6 3c9c HSM_PRE_DATA7 3ca0 HSM_PRE_DATA8 3ca4 HSM_PRE_DATA9 3ca8 HSM_PRE_DATA10 3cac HSM_PRE_DATA11 3cb0 HSM_PRE_DATA12 3cb4 HSM_PRE_DATA13 3cb8 HSM_PRE_DATA14 3cbc HSM_PRE_DATA15 3cc0 HSM_LU_DATA0 3cc4 HSM_LU_DATA1 3cc8 HSM_LU_DATA2 3ccc HSM_LU_DATA3 3cd0 HSM_LU_DATA4 3cd4 HSM_LU_DATA5 3cd8 HSM_LU_DATA6 3cdc HSM_LU_DATA7 3ce0 HSM_LU_DATA8 3ce4 HSM_LU_DATA9 3ce8 HSM_LU_DATA10 3cec HSM_LU_DATA11 3cf0 HSM_LU_DATA12 3cf4 HSM_LU_DATA13 MODIFIER_HSA 3d00 HSA_CTRL 3d04 HSA_DATA0 3d08 HSA_DATA1 3d0c HSA_DATA2 3d10 HSA_DATA3 3d14 HSA_DATA4 3d18 HSA_DATA5 3d1c HSA_DATA6 3d20 HSA_DATA7 3d24 HSA_DATA8 3d28 HSA_DATA9 3d2c HSA_DATA10 3d30 HSA_DATA11 3d34 HSA_DATA12 3d38 HSA_DATA13 3d3c HSA_DATA14 3d40 HSA_DATA15 3d44 HSA_DATA16 3d48 HSA_DATA17 DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 3d80 ALE_DBG_CTRL 3d84 ALE_DBG_CMP_DATA 3d88 ALE_CARE_BIT 3d8c ALE_DBG_RISING_CHK 3d90 ALE_DBG_FALLING_CHK 3d94 ALE_DBG_OUT_1 3d98 ALE_DBG_OUT_2 3d9c ALE_DBG_OUT_3 3da0 ALE_DBG_OUT_4 3da4 ALE_DBG_OUT_5 3da8 ALE_DBG_OUT_6 3dac ALE_DBG_OUT_7 3db0 ALE_DBG_OUT_8 3db4 ALE_DBG_OUT_9 3db8 ALE_DBG_OUT_10 3dbc ALE_DBG_OUT_11 3dc0 ALE_DBG_OUT_12 3dc4 ALE_DBG_OUT_13 3dc8 ALE_DBG_OUT_14 3dcc ALE_DBG_OUT_15 3dd0 ALE_DBG_OUT_16 STATISTIC_COUNTERS 3e00 STAT_PRVTE_DROP_COUNTER0 3e04 STAT_PRVTE_DROP_COUNTER1 3e08 STAT_PRVTE_DROP_COUNTER2 3e0c STAT_PRVTE_DROP_COUNTER3 3e10 STAT_PRVTE_DROP_COUNTER4 3e14 STAT_PRVTE_DROP_COUNTER5 3e18 STAT_PRVTE_DROP_COUNTER6 3e1c STAT_PRVTE_DROP_COUNTER7 3e20 STAT_PRVTE_DROP_COUNTER8 3e24 STAT_PRVTE_DROP_COUNTER9 3e28 STAT_PRVTE_DROP_COUNTER10 3e2c STAT_PRVTE_DROP_COUNTER11 3e30 STAT_PRVTE_DROP_COUNTER12 3e34 STAT_PRVTE_DROP_COUNTER13 3e38 STAT_PRVTE_DROP_COUNTER14 3e3c STAT_PRVTE_DROP_COUNTER15 3e40 STAT_PRVTE_DROP_COUNTER16 3e44 STAT_PRVTE_DROP_COUNTER17 3e48 STAT_PRVTE_DROP_COUNTER18 3e4c STAT_PRVTE_DROP_COUNTER19 3e50 STAT_PRVTE_DROP_COUNTER20 3e54 STAT_PRVTE_DROP_COUNTER21 3e58 STAT_PRVTE_DROP_COUNTER22 3e5c STAT_PRVTE_DROP_COUNTER23 3e60 STAT_PRVTE_DROP_COUNTER24 3e64 STAT_PRVTE_DROP_COUNTER25 3e68 STAT_PRVTE_DROP_COUNTER26 3e6c STAT_PRVTE_DROP_COUNTER27 3e70 STAT_PRVTE_DROP_COUNTER28 3e74 STAT_PRVTE_DROP_COUNTER29 3e78 STAT_PRVTE_DROP_COUNTER30 3e7c STAT_PRVTE_DROP_COUNTER31 3e80 STAT_PRVTE_DROP_COUNTER32 3e84 STAT_PRVTE_DROP_COUNTER33 3e88 STAT_PRVTE_DROP_COUNTER34 3e8c STAT_PRVTE_DROP_COUNTER35 3e90 STAT_PRVTE_DROP_COUNTER36 3e94 STAT_PRVTE_DROP_COUNTER37 3e98 STAT_PRVTE_DROP_COUNTER38 3e9c STAT_PRVTE_DROP_COUNTER39 3ea0 STAT_PRVTE_DROP_COUNTER40 3ea4 STAT_PRVTE_DROP_COUNTER41 3ea8 STAT_PRVTE_DROP_COUNTER42 3eac STAT_PRVTE_DROP_COUNTER43 3eb0 STAT_PRVTE_DROP_COUNTER44 CONGESTION_AVOIDANCE 3eb4 WRED_DROP_CNTR_PIDX 3eb8 WRED_DROP_CNTR_CIDX 3ebc WRED_DROP_CNTR 3ec4 WRED_CNTR_RST SMART_PACKET_GENERATOR 3f00 SPG_PORT_PKT_TRAP BIST_BISR 4000 BIST_CTL_ALE1 4004 BIST_CTL_ALE2 400c BIST_CTL_ALE3 4014 BIST_CTL_ALE4 4018 BIST_CTL_ALE5 401c BIST_CTL_ALE6 4024 BIST_CTL_ALE7 402c BIST_CTL_ALE8 4030 BIST_CTL_ALE9 4034 BIST_CTL_ALE10 4038 BIST_CTL_ALE11 403c BIST_TCAM_128_144_9 4044 BIST_TCAM_128_72_9 404c BIST_TCAM_128_144_4 4050 BIST_BCAM_64 4054 BISR_CTL_ALE12 4058 BISR_CTL_ALE12_INFO 405c ALE_DVS_CTRL ATTACK_PREVENTION 4100 ATK_PRVNT_PORT_EN 4108 ATK_PRVNT_CTRL 410c ATK_PRVNT_ACT 4110 ATK_PRVNT_IPV6_CTRL 4114 ATK_PRVNT_ICMP_CTRL 4118 ATK_PRVNT_TCP_CTRL 411c ATK_PRVNT_SMURF_CTRL 4120 ATK_PRVNT_STS 4124 ATK_PRVNT_ARP_INVLD_PORT_ACT 4134 ATK_PRVNT_PORT_GARP_ACT INGRESS_AND_EGRESS_ACL 4200 ACL_TMPLTE_CTRL FLOWCONTROL_BACKPRESSURE_THRESHOLD 4300 FC_P_FLD_HOL_PRVNT_EN 4308 FC_FLD_HOL_PRVNT_CTRL INGRESS_AND_EGRESS_ACL 4400 ACL_RULE_HIT_INDICATION 4520 ACL_GLB_HIT_INDICATION BIST_BISR 5000 BIST_CTL_MAC1 5024 BIST_CTL_MAC2 5048 BIST_CTL_MAC3 5058 BIST_CTL_MAC4 5068 BIST_CTL_MAC5 6000 BIST_OQ_INFO_STATUS 6004 BIST_OQ_LL_STATUS_0 601c BIST_OQ_LL_STATUS_1 6020 BISR_OQ_HSA_0 6024 BISR_INFO_OQ_HSA0_L 6028 BISR_OQ_HSA_1 602c BISR_INFO_OQ_HSA1 6030 BIST_EGR_DVS_CTRL POWER_SAVING 6034 EEE_TX_Q_CTRL NIC_DMA 6038 DMA_IF_RX_RING_SIZE 603c DMA_IF_RX_RING_CNTR FLOWCONTROL_BACKPRESSURE_THRESHOLD 6040 FC_Q_EGR_DROP_THR 6060 FC_CPUQ_EGR_DROP_THR CONGESTION_AVOIDANCE 6080 WRED_GLB_CTRL 6084 WRED_PORT_THR_CTRL 6090 WRED_QUEUE_THR_CTRL 60f0 SC_P_CTRL SCHEDULING 60f4 SCHED_CTRL 60f8 SCHED_LB_TICK_TKN_CTRL 60fc SCHED_LB_THR OAM 6100 OAM_PORT_DYING_GASP_CTRL SMART_PACKET_GENERATOR 6108 SPG_GLB_CTRL 610c SPG_PORT_TX_GRP_CTRL 6114 SPG_PORT_STS TABLE_ACCESS 611c TBL_ACCESS_CTRL_2 6120 TBL_ACCESS_DATA_2 SCHEDULING 6200 SCHED_LB_TICK_TKN_PPS_CTRL 6204 SCHED_PPS_CTRL BIST_BISR 6800 BIST_PG_MEM 6804 BIST_PH_MEM 6808 BIST_PT_MEM 680c BIST_ENCAP_MEM_1 6810 BIST_ENCAP_MEM_0 6814 BIST_ENCAP_TCAM 6818 BISR_UNTAG_MEM 681c BISR_INFO_UNTAG_MEM 6820 BISR_ENCAP_DVS_CTRL IEEE802_1Q_VLAN 6824 VLAN_EGR_CNVT_CTRL 6828 VLAN_PORT_TAG_STS_CTRL 68fc VLAN_PORT_EGR_ITPID_CTRL 690c VLAN_PORT_EGR_OTPID_CTRL 691c RNG_CHK_VID_EGR_XLATE_CTRL NIC_DMA 699c DMA_IF_PKT_CTRL MIRRORING 69a0 MIR_RSPAN_VLAN_CTRL 69b0 MIR_RSPAN_TX_CTRL REMARKING 69b4 RMK_CTRL 69b8 RMK_PORT_RMK_EN_CTRL 6a8c RMK_PORT_OPRI_SRC_CTRL 6a94 RMK_IPRI_CTRL 6a98 RMK_OPRI_CTRL 6a9c RMK_PORT_DEI_TAG_CTRL 6aa4 RMK_DEI_CTRL 6aa8 RMK_DSCP_CTRL ETHERNET_AV 6adc AVB_PORT_CLASS_A_EN_MAC 6ae4 AVB_PORT_CLASS_B_EN_MAC 6aec AVB_CTRL_MAC CFM 6af0 ETH_DM_TX_DLY DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 6af4 PKTENCAP_PORT_DBG_CTRL L3_ROUTING 6afc ROUTING_SA_CTRL A list of source addresses used by the switch when L3-forwarding a … L3_VPN_MPLS 6b7c MPLS_CTRL TABLE_ACCESS 6b80 TBL_ACCESS_CTRL_1 6b84 TBL_ACCESS_DATA_1 REMARKING 6c00 RMK_PORT_OPRI_SRC_EXT_CTRL 6c10 PRI_SEL_PORT_PRI_COPY 6c28 RMK_DSCP2IPRI_CTRL 6c44 RMK_DSCP2OPRI_CTRL BIST_BISR 7000 MBIST_SW01_CTL_STD 7004 MBIST_SW02_CTL_STD 7008 MBIST_SW03_CTL_STD 700c MBIST_SW04_CTL_STD 7010 MBISR_SW07_CTL 7014 MBIST_SW07_0_STD 7018 MBIST_SW07_1_STD 701c MBIST_SW07_2_STD 7020 INGR_PKT_BUF_BYPASS_PG_ADDR_0_1 7024 INGR_PKT_BUF_BYPASS_PG_ADDR_2_3 7028 INGR_DVS_CTRL FLOWCONTROL_BACKPRESSURE_THRESHOLD 702c FC_DROP_THR 7030 FC_GLB_HI_THR 7034 FC_GLB_LO_THR 7038 FC_GLB_FCOFF_HI_THR 703c FC_GLB_FCOFF_LO_THR 7040 FC_P_THR_SET_SEL 7050 FC_P_HI_THR 7060 FC_P_LO_THR 7070 FC_P_FCOFF_HI_THR 7080 FC_P_USED_PAGE_CNT 7158 FC_TL_USED_PAGE_CNT 715c FC_ACT_CTRL DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 7230 IGR_PORT_DBG_CTRL 7238 IGR_DBG_CTRL BIST_BISR 7400 MBIST_SW05_CTL_STD 7404 PKT_PARSE_DVS_CTRL IEEE802_1Q_VLAN 7408 VLAN_ETAG_TPID_CTRL 740c VLAN_PORT_ETAG_TPID_CMP DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 7414 PARSER_DBG_CTRL PARSER 7418 PARSER_FIELD_SELTOR_CTRL 7448 PARSER_CTRL BIST_BISR 7800 BIST_NIC_L2MSG 7804 NIC_DVS_CTRL ADDRESS_TABLE_LOOKUP 7808 L2_NOTIFICATION_CTRL NIC_DMA 780c DMA_IF_RX_BASE_DESC_ADDR_CTRL 782c DMA_IF_RX_CUR_DESC_ADDR_CTRL 784c DMA_IF_TX_BASE_DESC_ADDR_CTRL 7854 DMA_IF_TX_CUR_DESC_ADDR_CTRL 785c DMA_IF_NBUF_BASE_DESC_ADDR_CTRL 7860 DMA_IF_NBUF_CUR_DESC_ADDR_CTRL 7864 DMA_IF_INTR_MSK 7868 DMA_IF_INTR_STS 786c DMA_IF_CTRL 7870 DMA_IF_PHYSICAL_ADDR_MSK 7874 DMA_L2MSG_TMROUT 7878 DMA_L2MSG_CNT_SEL 787c DMA_RDMA_CNT_SEL DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 7880 CFG_NICDBG_SEL_0 7884 CFG_NICDBG_SEL_1 7888 CFG_NICDBG_SEL_2 788c CFG_NICDBG_SEL_3 7890 CFG_NICDBG_SEL_4 7894 CFG_NICDBG_SEL_5 BIST_BISR 7c00 MBIST_GLB_START 7c04 MBIST_GLB_CTRL 7c08 MBIST_GLB_STS 7c0c MBISR_GLB_STS 7c10 MBIST_TCAM_DRF_STS 7c14 BIST_SOC_DVS_CTRL 7c18 SOC_CPU_BIST_0 7c1c SOC_CPU_BIST_1 7c20 SOC_CPU_BIST_2 7c24 SOC_CPU_SRAM_CTRL_BIST MAC_CONTROL 8000 MAC_PADDING_CTRL 8004 MAC_PORT_CTRL Stride is 0x80 POWER_SAVING 8008 EEE_CTRL PTP_PRECISION_TIME_PROTOCOL 800c PTP_PORT_EN 8010 PTP_PORT_RX_TIME 8028 PTP_PORT_TX_TIME 8040 PTP_INTR_STS IEEE802_1Q_VLAN 8044 VLAN_PORT_ITAG_TPID_CMP_MSK 8048 VLAN_PORT_OTAG_TPID_CMP_MSK CONGESTION_AVOIDANCE 804c SC_P_EN DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM 8050 MAC_DBG_CTRL CFM 9a80 CCM_TAG_CTRL 9a84 CCM_TX_CTRL 9a88 CCM_TX_INST_CTRL 9aa8 CCM_TX_INST_P_CFG PHY_SERDES a000 SDS0_1_XSG0 a100 SDS0_1_XSG1 a300 SDS0_1_ANA_RG_EXT a400 SDS2_3_XSG0 a500 SDS2_3_XSG1 a700 SDS2_3_ANA_RG_EXT a800 SDS4_5_XSG0 a900 SDS4_5_XSG1 ab00 SDS4_5_ANA_RG_EXT ac00 SDS6_7_XSG0 ad00 SDS6_7_XSG1 af00 SDS6_7_ANA_RG_EXT b000 SDS8_9_XSG0 b100 SDS8_9_XSG1 b200 SDS8_9_TGRX b300 SDS8_9_ANA_TG b400 SDS10_11_XSG0 b500 SDS10_11_XSG1 b700 SDS10_11_ANA_RG_EXT b800 SDS12_13_XSG0 b900 SDS12_13_XSG1 ba00 SDS12_13_TGRX bb00 SDS12_13_ANA_TG STATISTIC_COUNTERS c000 STAT_PORT_STANDARD_MIB f500 STAT_BRIDGE_DOT1DTPLEARNEDENTRYDISCARDS f504 STAT_RST f508 STAT_PORT_RST f50c MIB_BIST_CTL