Realtek switch SoC docs

mango registers

Registers

Offset Name Summary
CHIP_INFORMATION
0000 CHIP_INFO_DMY
0004 MODEL_NAME_INFO
0008 CHIP_INFO
000c CFG_DMY_CHIP_INFO_0
0010 CFG_DMY_CHIP_INFO_1
ECO
0014 CHIP_INFO_RSVD
BIST_BISR
0040 GLB_MBIST_CTRL_DMY
0044 GLB_MBIST_CTRL
0048 GLB_MBIST_STA
HW_MISC
0080 TM0_CTRL0
0084 TM0_CTRL1
0088 TM0_CTRL2
008c TM0_CTRL3
0090 TM0_CTRL4
0094 TM0_CTRL5
0098 TM0_CTRL6
009c TM0_CTRL7
00a0 TM0_RESULT0
00a4 TM0_RESULT1
00a8 TM0_RESULT2
00ac TM0_RESULT3
ECO
00b0 TM_CTRL_RSVD
IP_TUNNEL
0100 TUNNEL_QOS_PROFILE
TABLE_ACCESS
0200 TBL_ACCESS_CTRL_3
0204 TBL_ACCESS_DATA_3
PORT_EXTENSION
0228 PE_ETAG_RMK_CTRL
022c PE_PORT_ETAG_EGR_CTRL
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
0310 ENP_DBG_TRI
0314 ENP_DBG_CTL
0318 ENP_DBG_MASK
031c ENP_DBG_CMP
0320 ENP_DBG_DATA
RESET
0400 RST_GLB_CTRL
0404 CHIP_RST_STS
0408 WDOG_RST_STS
040c BONDING_STS
ECO
0410 PWRON_REG_RSVD
BIST_BISR
0500 MBIST_PAR_START
0504 MBIST_PAR_RESUME
0508 MBIST_PAR_GLB
050c MBIST_PAR01_0
0510 MBIST_PAR01_1
0514 MBIST_PAR02
0518 MBIST_PAR03
802_1Q_VLAN_QINQ
051c VLAN_ETAG_TPID_CTRL
0520 VLAN_PORT_ETAG_TPID_CMP
IP_TUNNEL
0528 TUNNEL_VXLAN_CTRL
MPLS_VPLS
052c MPLS_PARSE_CTRL
PIE
0530 PIE_FIELD_SELTOR_CTRL
L2_TUNNEL
0568 CAPWAP_PARSE_CTRL
PARSER
056c PARSER_CTRL
0570 GTP_PARSE_CTRL
0574 DIAMETER_PARSE_CTRL
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
0578 PAR_DBG_TRI_CTL
ECO
057c PKT_PARSER_RSVD
L2_ENTRY_NOTIFICATION
0580 L2_NTFY_PKT_MAGIC_NUM
0584 L2_NTFY_PKT_FIFO_STS
0588 L2_NTFY_PKT_QUE_ID
058c L2_NTFY_DBG_PKT_CNT
0590 L2_NTFY_DBG_EVENT_CNT
CFM
0594 CCM_TX_TAG_CTRL
0598 CCM_TX_INST_CTRL
05b8 CCM_TX_INST_MEM
05c8 CCM_TX_INST_TRK_PRESENT
05cc CCM_TX_INST_PKT
ECO
05ec CFM_GEN_RSVD
LED
0600 LED_GLB_CTRL

External LED controller global register (of the RTL8231)

0604 LED_PORT_NUM_CTRL

Number of status LEDs per port

0614 LED_SET_3_CTRL1

LED set 3 control register (LED 2 and 3)

0618 LED_SET_3_CTRL0

LED set 3 control register (LED 0 and 1)

061c LED_SET_2_CTRL1

LED set 2 control register (LED 2 and 3)

0620 LED_SET_2_CTRL0

LED set 2 control register (LED 0 and 1)

0624 LED_SET_1_CTRL1

LED set 1 control register (LED 2 and 3)

0628 LED_SET_1_CTRL0

LED set 1 control register (LED 0 and 1)

062c LED_SET_0_CTRL1

LED set 0 control register (LED 2 and 3)

0630 LED_SET_0_CTRL0

LED set 0 control register (LED 0 and 1)

0634 LED_PORT_COPR_SET_SEL_CTRL

Copper port configuration set selection

0644 LED_PORT_FIB_SET_SEL_CTRL

Fiber port configuration set selection

0654 LED_PORT_COPR_MASK_CTRL

Port mask for copper-enabled ethernet ports

065c LED_PORT_FIB_MASK_CTRL

Port mask for fiber-enabled ethernet ports

0664 LED_PORT_COMBO_MASK_CTRL

Port mask for combo ethernet ports

066c SW_LED_LOAD

Commit software LED settings

0670 LED_PORT_SW_EN_CTRL

Bit mask indicating which LEDs are software controlled.

068c LED_PORT_SW_CTRL

Configure a software controlled LED

076c LED_INDRT_ACCESS_CTRL

External LED indirect access controller (of the RTL8231)

0770 LED_LOAD_LV1_10G
0774 LED_LOAD_LV2_10G
0778 LED_LOAD_LV3_10G
077c LED_LOAD_LV1_5G
0780 LED_LOAD_LV2_5G
0784 LED_LOAD_LV3_5G
0788 LED_LOAD_LV1_2P5G
078c LED_LOAD_LV2_2P5G
0790 LED_LOAD_LV3_2P5G
0794 LED_LOAD_LV1_TP1G
0798 LED_LOAD_LV2_TP1G
079c LED_LOAD_LV3_TP1G
07a0 LED_LOAD_LV1_1G
07a4 LED_LOAD_LV2_1G
07a8 LED_LOAD_LV3_1G
07ac LED_LOAD_LV1_500M
07b0 LED_LOAD_LV2_500M
07b4 LED_LOAD_LV3_500M
07b8 LED_LOAD_LV1_100M
07bc LED_LOAD_LV2_100M
07c0 LED_LOAD_LV3_100M
07c4 LED_LOAD_LV1_10M
07c8 LED_LOAD_LV2_10M
07cc LED_LOAD_LV3_10M
07d0 LED_P_LOAD_CTRL
07d4 EXT_GPIO_GLB_CTRL

External GPIO control register (of the RTL8231)

07d8 EXT_GPIO_TRIG

External GPIO trigger configuration (of the RTL8231)

07dc EXT_GPIO_DIR_CTRL_1

External GPIO direction register (of the RTL8231)

07e0 EXT_GPIO_DIR_CTRL_2

External GPIO direction register (of the RTL8231)

07e4 EXT_GPIO_DIR_CTRL_3

External GPIO direction register (of the RTL8231)

07e8 EXT_GPIO_DATA_CTRL_1

External GPIO data register (of the RTL8231)

07ec EXT_GPIO_DATA_CTRL_2
07f0 EXT_GPIO_DATA_CTRL_3
07f4 EXT_GPIO_INDRT_ACCESS_CTRL

External GPIO indirect access controller (of the RTL8231)

ECO
07f8 LED_CTRL_RSVD
NIC_DMA
0800 DMA_IF_RX_BASE_DESC_ADDR_CTRL
0880 DMA_IF_RX_CUR_DESC_ADDR_CTRL
0900 DMA_IF_TX_BASE_DESC_ADDR_CTRL
0908 DMA_IF_TX_CUR_DESC_ADDR_CTRL
0910 DMA_IF_INTR_RX_RUNOUT_MSK
0914 DMA_IF_INTR_RX_DONE_MSK
0918 DMA_IF_INTR_TX_DONE_MSK
091c DMA_IF_INTR_RX_RUNOUT_STS
0920 DMA_IF_INTR_RX_DONE_STS
0924 DMA_IF_INTR_TX_DONE_STS
0928 DMA_IF_CTRL
092c DMA_IF_PHYSICAL_ADDR_MSK
0930 MBIST_NIC_W
0934 MBIST_NIC_R
0938 NIC_RING_DUMMYREAD_EN
093c NIC_RDMA_CNT_SEL
0940 NICDBG_SEL_0
0944 NICDBG_SEL_1
0948 NICDBG_SEL_2
094c NICDBG_SEL_3
0950 NICDBG_SEL_4
0954 NICDBG_SEL_5
0958 NICDBG_RD
095c NICDBG_TEST
0960 NIC_DBGMUX_SEL_0
0964 NIC_DBGMUX_SEL_1
0968 NIC_DBGMUX_SEL_2
096c NIC_DBGMUX_SEL_3
0970 NIC_DRIVER_READY
0974 NIC_DBG_DT_0
0978 NIC_DBG_DT_1
097c NIC_DBG_DT_2
0980 NIC_DBG_DT_3
0984 NIC_DBG_DT_4
0988 NIC_DBG_DT_5
098c NIC_DBG_DT_6
0990 NIC_DBG_DT_7
0994 NIC_DBG_OUT_CUR
0998 NIC_DBG_OUT
099c NIC_RX_SOP_CNT
09a0 NIC_RX_EOP_CNT
09a4 NIC_TX_SOP_CNT
09a8 NIC_TX_EOP_CNT
09ac NIC_L2MSG_CNT
09b0 NIC_CNT_CLR
09b4 NIC_RX_TX_FIFO
09b8 NIC_L2MSG_FIFO
09bc NIC_PRST
09c0 NIC_FRC_NIC_DBGO
09c4 NIC_FRCV_NIC_DBGO
09c8 NIC_RX_SOP_CNT_LX
09cc NIC_RX_EOP_CNT_LX
09d0 NIC_TX_SOP_CNT_LX
09d4 NIC_TX_EOP_CNT_LX
09d8 NIC_L2MSG_CNT_LX
L2_ENTRY_NOTIFICATION
09dc L2_NTFY_RING_BASE_ADDR
09e0 L2_NTFY_RING_CUR_ADDR
09e4 L2_NTFY_IF_INTR_MSK
09e8 L2_NTFY_IF_INTR_STS
09ec L2_NTFY_NIC_FIFO_STS
09f0 L2_NTFY_NIC_TIMEOUT
09f4 L2_NTFY_NIC_MSG_CNT_SEL
ECO
09f8 NIC_RSVD
PLL_BIAS
0a00 BG_POR_TOP
0a04 XTAL_TOP
0a08 PLL_GLB_COM
0a0c PLL_TOP
0a10 PLL_GLB_SIG
0a14 PLL_GLB_CTRL
0a18 PLL_CPU_CTRL0
0a1c PLL_CPU_CTRL1
0a20 PLL_CPU_CTRL2
0a24 PLL_CPU_MISC_CTRL
0a28 PLL_SW_CTRL0
0a2c PLL_SW_CTRL1
0a30 PLL_SW_CTRL2
0a34 PLL_SW_MISC_CTRL
0a38 PLL_LXB_CTRL0
0a3c PLL_LXB_CTRL1
0a40 PLL_LXB_CTRL2
0a44 PLL_LXB_MISC_CTRL
0a48 PLL_PCIE_CTRL0
0a4c PLL_PCIE_CTRL1
0a50 PLL_PCIE_CTRL2
0a54 PLL_PCIE_MISC_CTRL
ECO
0a58 PLL_CTRL_RSVD
MAC_CONTROL
0c00 SMI_INDRT_ACCESS_CTRL_0
0c04 SMI_INDRT_ACCESS_CTRL_1
0c08 SMI_INDRT_ACCESS_CTRL_2
0c10 SMI_INDRT_ACCESS_CTRL_3
0c14 SMI_INDRT_ACCESS_BC_PHYID_CTRL
0c18 SMI_INDRT_ACCESS_MMD_CTRL
0c1c SMI_DBG_CTRL
0c20 MDXDBG_SEL0
0c24 MDXDBG_SEL1
0c28 MDXDBG_SEL2
0c2c MDXDBG_SEL3
0c30 MDXDBG_SEL4
0c34 MDXDBG_SEL5
0c38 MDXDBG_TSET
0c3c MDXDBG_READ_DATA
0c40 MDX_DBGMUX_SEL_1
0c44 MDX_DBGMUX_SEL_2
0c48 MDX_DBGMUX_SEL_3
0c4c MDX_DBG_DT_0
0c50 MDX_DBG_DT_1
0c54 MDX_DBG_DT_2
0c58 MDX_DBG_DT_3
0c5c MDX_DBG_DT_4
0c60 MDX_DBG_DT_5
0c64 MDX_DBG_DT_6
0c68 MDX_DBG_DT_7
0c6c MDX_DBG_OUT_CUR
0c70 MDX_DBG_OUT
0c74 SMI_PORT_ADDR_CTRL
0c9c SMI_PORT_POLLING_SEL
0cac SMI_PHY_ABLTY_GET_SEL
0cbc SMI_GLB_CTRL1
0cc0 SMI_GLB_CTRL0
0cc4 SMI_BYPASS_ABLTY_LOCK_CTRL
0ccc SMI_PORT_POLLING_CTRL
0cd4 TX_IDLE_TMR_CTRL
0cd8 LINK_DELAY_CTRL
0cdc MDIO_FREE_CNT_CTRL
0ce0 SMI_GPHY_RLFD_POLLING_SEL
0ce4 SMI_RLFD_POLLING_BIT_SEL
0ce8 SMI_10GPHY_RLFD_POLLING_SEL
0cec SMI_GPHY_POLLING_SEL
0cf0 SMI_10GPHY_POLLING_SEL0
0cf4 SMI_10GPHY_POLLING_SEL1
0cf8 SMI_10GPHY_POLLING_SEL2
0cfc SMI_10GPHY_POLLING_SEL3
0d00 SMI_10GPHY_POLLING_SEL4
0d04 SMI_PHY_REG_CHK_CHK0_MSK
0d0c SMI_PHY_REG_CHK_CHK1_MSK
0d14 SMI_PHY_REG_CHK_CHK2_MSK
0d1c SMI_PHY_REG_CHK_CHK3_MSK
0d24 SMI_PHY_REG_CHK_CHK4_MSK
0d2c SMI_PHY_REG_CHK0_CTRL
0d30 SMI_PHY_REG_CHK0_MMD_ADDR
0d34 SMI_PHY_REG_CHK1_CTRL
0d38 SMI_PHY_REG_CHK1_MMD_ADDR
0d3c SMI_PHY_REG_CHK2_CTRL
0d40 SMI_PHY_REG_CHK2_MMD_ADDR
0d44 SMI_PHY_REG_CHK3_CTRL
0d48 SMI_PHY_REG_CHK3_MMD_ADDR
0d4c SMI_PHY_REG_CHK4_CTRL
0d50 SMI_PHY_REG_CHK4_MMD_ADDR
0d54 SMI_PHY_REG_CHK0_DATA_GPHY
0d58 SMI_PHY_REG_CHK1_DATA_GPHY
0d5c SMI_PHY_REG_CHK2_DATA_GPHY
0d60 SMI_PHY_REG_CHK3_DATA_GPHY
0d64 SMI_PHY_REG_CHK4_DATA_GPHY
0d68 SMI_PHY_REG_CHK0_DATA_10GPHY
0d6c SMI_PHY_REG_CHK1_DATA_10GPHY
0d70 SMI_PHY_REG_CHK2_DATA_10GPHY
0d74 SMI_PHY_REG_CHK3_DATA_10GPHY
0d78 SMI_PHY_REG_CHK4_DATA_10GPHY
0d7c SMI_PHY_REG_CHK0_RESULT
0d84 SMI_PHY_REG_CHK1_RESULT
0d8c SMI_PHY_REG_CHK2_RESULT
0d94 SMI_PHY_REG_CHK3_RESULT
0d9c SMI_PHY_REG_CHK4_RESULT
0da4 SMI_PHY_REG_CHK0_RESULT_ERR
0dac SMI_PHY_REG_CHK1_RESULT_ERR
0db4 SMI_PHY_REG_CHK2_RESULT_ERR
0dbc SMI_PHY_REG_CHK3_RESULT_ERR
0dc4 SMI_PHY_REG_CHK4_RESULT_ERR
0dcc MAC_FORCE_MODE_CTRL
0eb0 MAC_RLFD_EN
0eb8 MAC_RLFD_STS
0ec0 MAC_LINK_STS

Link status as the MAC sees it.

0ec8 MAC_LINK_MEDIA_STS
0ed0 MAC_LINK_SPD_STS
0ef0 MAC_LINK_DUP_STS
0ef8 MAC_TX_PAUSE_STS
0f00 MAC_RX_PAUSE_STS
0f08 MAC_EEE_ABLTY
0f10 MAC_MSTR_SLV_STS
0f18 FEFI_STS
0f20 FORCE_MAC_SPD
0f28 SPD_FORCE_VAL
0f48 SDS_ABLTY
0f4c RXDV_H
0f50 RXDV_L
0f54 TX_IDLE_H
0f58 TX_IDLE_L
0f5c PHY_UNIDIR_H
0f60 PHY_UNIDIR_L
0f64 MACRX_DUPDET_H
0f68 MACRX_DUPDET_L
0f6c FRC_RXDV_H
0f70 FRC_RXDV_L
0f74 FRC_TX_IDLE_H
0f78 FRC_TX_IDLE_L
0f7c FRC_PHY_UNIDIR_H
0f80 FRC_PHY_UNIDIR_L
0f84 FRC_MACRX_DUPDET_H
0f88 FRC_MACRX_DUPDET_L
0f8c FRCV_RXDV_H
0f90 FRCV_RXDV_L
0f94 FRCV_TX_IDLE_H
0f98 FRCV_TX_IDLE_L
0f9c FRCV_PHY_UNIDIR_H
0fa0 FRCV_PHY_UNIDIR_L
0fa4 FRCV_MACRX_DUPDET_H
0fa8 FRCV_MACRX_DUPDET_L
REMOTE_ACCESS
0fac RMT_PHY_ACCESS_CTRL
0fb0 RMT_PHY_ACCESS_DATA
0fb4 RMT_PHY_ACCESS_CFG
0fb8 RMT_PHY_ACCESS_PHY_MSK_CTRL
0fc0 RMT_PHY_ACCESS_PORT_ID_CTRL
0fc4 RMT_PHY_ACCESS_PARAM
0fc8 RMT_PHY_ACCESS_MMD_PARAM
ECO
0fcc MDX_CTRL_RSVD
INTERFACE
1000 I2C_SLV_CTRL
1004 I2C_MST_IF_CTRL
1008 I2C_MST_IF_SEL
100c I2C_MST1_CTRL
1010 I2C_MST1_MEMADDR_CTRL
1014 I2C_MST1_DATA_CTRL
1024 I2C_MST2_CTRL
1028 I2C_MST2_MEMADDR_CTRL
102c I2C_MST2_DATA_CTRL
103c SPI_CTRL0

SPI Controller register (0)

1040 SPI_CTRL1
1044 SPI_CTRL2
1048 SPI_DATA
1248 SPI_ADDR
124c MAC_SLV_TIMEOUT
1250 TEST_MDX_CTRL
1254 TEST_MDX_DATA
1258 GPIO_DRV_STRENGTH
125c GPIO_SLEW_RATE
1260 IO_DRV_STRENGTH
1264 IO_SLEW_RATE
1268 IO_SMIT_TRIG
INTERRUPT
126c IMR_PORT_LINK_STS_CHG
1274 IMR_SERDES_ERR
1278 IMR_REMOTE_INTR_STS_UPD
127c IMR_MISC
1280 IMR_EXT_GPIO
1288 IMR_THERMAL_METER
128c IMR_AUTO_RECOVERY
1290 IMR_SERDES_UPD_PHYSTS_0

Interrupt Mask Register SerDeS PHY Update status

1298 IMR_RLFD

Interrupt Mask Control Register for Rapid Link Fault Detection

12a0 IMR_SERDES_RXIDLE

Interrupt Mask Register for RX IDLE

12a4 IMR_DBGO
12a8 DBG_CTRL0
12ac DBG_CTRL1
12b0 DBG_CTRL2
12b4 ISR_GLB_SRC_STS
12b8 ISR_PORT_LINK_STS_CHG
12c0 ISR_SERDES_ERR
12c4 ISR_REMOTE_INTR_STS_UPD
12c8 ISR_MISC
12cc ISR_EXT_GPIO
12d4 EXT_GPIO_INTR_MODE
12e0 ISR_THERMAL_METER
12e4 ISR_AUTO_RECOVERY
12e8 ISR_SERDES_UPD_PHYSTS
12f0 ISR_RLFD
12f8 ISR_SERDES_RXIDLE
12fc ISR_DBGO
HW_MISC
1300 EFUSE_ACCESS_CTRL
1304 EFUSE_WDATA_CTRL
1308 EFUSE_RDATA_CTRL
130c SPD_SENR_CTRL
1310 SPD_DATA_IN_0
1314 SPD_DATA_IN_1
1318 SPD_DATA_IN_2
131c SPD_DATA_OUT_0
1320 SPD_DATA_OUT_1
1324 SPD_DATA_OUT_2
1328 SPD_DBG_OUT_0_1
132c SPD_DBG_OUT_2
1330 VOL_CTRL_RESIS
1334 GLB_DEBUG_SELECT
1338 GLB_DEBUG_DATA
133c GLB_DEBUG_ENABLE
1340 GLB_DEBUG_PIN_EN
1344 VOLT_PROB_CTRL
1348 EFUSE_CHK_RSLT_CTRL
134c EFUSE_RIR0_DATA_CTRL_RSVD
1350 EFUSE_RIR1_DATA_CTRL_RSVD
1354 GLB_DEBUG_DATA_VALUE
MAC_CONTROL
1358 MAC_L2_GLOBAL_CTRL2
135c MAC_L2_ADDR_CTRL
1364 MAC_CPU_TAG_ID_CTRL
1368 MAC_L2_CPU_MAX_LEN_CTRL
136c MAC_SERDES_MODE_CTRL
13a4 MAC_GROUP0_1_CTRL
13a8 MAC_GROUP2_3_CTRL
13ac MAC_GROUP4_CTRL
13b0 MAC_GROUP5_CTRL
13b4 MAC_GROUP6_7_CTRL
13b8 MAC_GROUP8_11_CTRL
13bc PROT_SERDSE_MUX_CTRL_0

MAC port mux setup

13c0 PROT_SERDSE_MUX_CTRL_1

MAC port mux setup

13c4 FIB_UNIDIR_CTRL

Fiber UniDirectional Control Register

PHY_SERDES
13cc SERDES_MODE_CTRL

SerDes Interface mode controller

13dc SERDES_UNIDIR_CTRL

SerDeS UniDirection Controller

13e0 SERDES_MISC_CTRL0

SerDeS Misc controller register 0

13e4 SERDES_MISC_CTRL1

SerDeS Misc controller register 1

13e8 USXGMII_SUBMODE_CTRL

SerDeS USXGMII Sub mode controller

POWER_SAVING
13f0 PS_SLOW_SYSCLK_CTRL
13f4 PS_SERDES_OFF_MODE_CTRL
13f8 PS_SOC_CTRL
802_1Q_VLAN_QINQ
13fc VLAN_TAG_TPID_CTRL
L2_ENTRY_NOTIFICATION
140c L2_NTFY_RST
RSPAN
1410 MIR_RSPAN_VLAN_CTRL
1420 MIR_RSPAN_TX_CTRL
OAM
1424 OAM_GLB_DYING_GASP_CTRL
1428 DYING_GASP_POLARITY_CTRL
CFM
142c ETH_DM_CLK_CTRL
1430 ETH_DM_TIME_FREQ
1434 ETH_DM_TIME_CTRL
1438 ETH_DM_TIME_CTRL_SEC
L2_TUNNEL
1440 CAPWAP_UDP_PORT
PORT_EXTENSION
1444 PE_ETAG_CTRL
UNIT_CONTROL
1448 STK_GBL_CTRL
144c STK_PORT_ID_CTRL
145c STK_DEV_PORT_MAP_CTRL
147c STK_NON_UNICAST_BLOCK_CTRL
149c STK_DBG_CTRL
REMOTE_ACCESS
14a0 RMT_REG_ACCESS_CTRL
14a4 RMT_REG_ACCESS_DATA
14a8 RMT_REG_ACCESS_CFG
14ac RMT_ACCESS_SEM
14cc RMT_ACCESS_SEM_CTRL
REMOTE_INTERRUPT
14d0 RMT_INTR_CTRL
14d4 RMT_INTR_INFO
1514 RMT_INTR_DATA_CCM
1534 RMT_INTR_DATA_LINK_STS
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
15b4 EFUSE_DBG_TRI
15b8 EFUSE_DBG_CTL
15bc EFUSE_DBG_MASK
15c0 EFUSE_DBG_CMP
15c4 EFUSE_DBG_VAL
15c8 EFUSE_DBG_DATA
15e8 GLB_DBG_TRI
15ec GLB_DBG_CTL
15f0 GLB_DBG_MASK
15f4 GLB_DBG_CMP
15f8 GLB_DBG_VAL
15fc GLB_DBG_DATA
161c LED_DBG_TRI
1620 LED_DBG_CTL
1624 LED_DBG_MASK
1628 LED_DBG_CMP
162c LED_DBG_VAL
1630 LED_DBG_DATA
1650 MIB_DBG_TRI
1654 MIB_DBG_CTL
1658 MIB_DBG_MASK
165c MIB_DBG_CMP
1660 MIB_DBG_VAL
1664 MIB_DBG_DATA
1684 CIF_DBG_TRI
1688 CIF_DBG_CTL
168c CIF_DBG_MASK
1690 CIF_DBG_CMP
1694 CIF_DBG_VAL
1698 CIF_DBG_DATA
AUTO_RECOVERY
16b8 RX_FIFO_STS
16bc RX_FIFO_ERR
16c0 SW_Q_RST_CNT
16c4 TRIG_AUTO_RECOVER_CTRL
16c8 AUTO_RECOVER_EVENT_FLAG_STS
16cc AUTO_RECOVER_EVENT_FLAG_ERR
ECO
16d0 MBIST_STK_W
16d4 MBIST_STK_R
16d8 STKDBG_TSET
16dc STK_DBGMUX_SEL_1
16e0 STK_DBGMUX_SEL_2
16e4 STK_DBGMUX_SEL_3
16e8 STK_DBG_DT_0
16ec STK_DBG_DT_1
16f0 STK_DBG_DT_2
16f4 STK_DBG_DT_3
16f8 STK_DBG_DT_4
16fc STK_DBG_DT_5
1700 STK_DBG_DT_6
1704 STK_DBG_DT_7
1708 STK_DBG_OUT_CUR
170c STK_DBG_OUT
1710 GLB_CTRL_RSVD
INTERRUPT
1800 ISR_STAT_TRIGGER
BIST_BISR
2000 MBIST_EGR_START_0
2004 MBIST_EGR_START_1
2008 MBIST_EGR_START_2
200c MBIST_EGR_RESUME_0
2010 MBIST_EGR_RESUME_1
2014 MBIST_EGR_RESUME_2
2018 MBIST_EGR_GLB
201c MBIST_EGR01
2020 MBIST_EGR02
2024 MBIST_EGR03
2028 MBIST_EGR04
202c MBIST_EGR05
2030 MBIST_EGR06
2034 MBIST_EGR07
2038 MBIST_EGR08
203c MBIST_EGR09
2040 MBIST_EGR10
2044 MBIST_EGR11
2048 MBIST_EGR12
204c MBIST_EGR13
2050 MBIST_EGR14
2054 MBIST_EGR15
2058 MBIST_EGR16
205c MBIST_EGR18
2060 MBIST_EGR19
2064 MBIST_EGR20
2068 MBISR_EXA_EGR_OUT_0
206c MBISR_EXA_EGR_OUT_1
2070 MBISR_EGR_OUT_0
2074 MBISR_EGR_OUT_1
2078 MEM_EGR_CTRL
207c MEM_EGR_INIT
NIC_DMA
2080 DMA_IF_RX_RING_SIZE
20ac DMA_IF_RX_RING_CNTR
20d8 DMA_IF_RX_RING_CNTR_FLAG
TABLE_ACCESS
20dc TBL_ACCESS_CTRL_4
20e0 TBL_ACCESS_DATA_4
POWER_SAVING
2154 EEE_MISC_CTRL1
EGRESS_BANDWIDTH_CONTROL
2158 EGBW_CTRL
215c EGBW_CPU_PPS_LB_CTRL
2160 EGBW_LB_CTRL
2164 EGBW_PORT_CTRL
232c EGBW_PORT_LB_RST
2334 EGBW_PORT_Q_MAX_LB_RST_SET0
2404 EGBW_PORT_Q_MAX_LB_RST_SET1
2414 EGBW_CPU_Q_MAX_LB_CTRL
2514 EGBW_CPU_Q_MAX_LB_RST
2518 EGBW_PORT_Q_ASSURED_LB_RST_SET0
25e8 EGBW_PORT_Q_ASSURED_LB_RST_SET1
25f8 EGBW_RATE_10M_CTRL
25fc EGBW_RATE_100M_CTRL
2600 EGBW_RATE_500M_CTRL
2604 EGBW_RATE_1G_CTRL
2608 EGBW_RATE_1250M_CTRL
260c EGBW_RATE_2500M_CTRL
2610 EGBW_RATE_5G_CTRL
2614 EGBW_RATE_10G_CTRL
FLOWCONTROL_BACKPRESSURE
2618 FC_Q_EGR_DROP_THR
26a8 FC_CPU_Q_EGR_DROP_THR
2728 FC_PORT_EGR_DROP_THR_SET_SEL
2738 FC_LB_PORT_Q_EGR_DROP_THR
273c FC_CPU_EGR_PAGE_CNT
2740 FC_CPU_Q_EGR_PAGE_CNT
27c0 FC_HSA_PAGE_CNT
CONGESTION_AVOIDANCE
27c4 SWRED_Q_DROP_RATE
27f4 SWRED_Q_THR
2884 SC_DRAIN_OUT_THR
SCHEDULING_QUEUE_MANAGEMENT
2888 SCHED_PORT_Q_CTRL_SET0
2f08 SCHED_PORT_Q_CTRL_SET1
2fc8 SCHED_CPU_Q_CTRL
3048 SCHED_PORT_ALGO_CTRL
3050 SCHED_CTRL
3054 WFQ_LB_CTRL
OAM
3058 OAM_PORT_DYING_GASP_CTRL
REMOTE_ACCESS
3060 RMT_TBL_ACCESS_SET_4_CTRL
3064 RMT_TBL_ACCESS_SET_4_DATA
30d8 RMT_TBL_ACCESS_SET_4_CFG
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
30dc EGR_DBG_TRI
30e0 EGR_DBG_CTL
30e4 EGR_DBG_MASK
30e8 EGR_DBG_CMP
30ec EGR_DBG_VAL
30f0 EGR_DBG_DATA
AUTO_RECOVERY
3110 TX_DSC_STS
3118 TX_DSC_ERR
3120 TX_DSC_CHK_TMR
3124 RET_EMPTY_PKT_BUF_STS
3128 RET_EMPTY_PKT_BUF_ERR
ECO
312c EGR_CTRL_RSVD
BIST_BISR
4000 MBIST_ACL_START
4004 MBIST_ACL_RESUME
4008 MBIST_ACL_GLB
400c MBIST_TCM00_ACL1
4010 MBIST_ACL00_DLY
4014 MBIST_TCM01_ACL1
4018 MBIST_ACL01_DLY
401c MBIST_TCM02_ACL1
4020 MBIST_ACL02_DLY
4024 MBIST_TCM03_ACL1
4028 MBIST_ACL03_DLY
402c MBIST_TCM04_ACL1
4030 MBIST_ACL04_DLY
4034 MBIST_TCM05_ACL1
4038 MBIST_ACL05_DLY
403c MBIST_TCM06_ACL1
4040 MBIST_ACL06_DLY
4044 MBIST_TCM07_ACL1
4048 MBIST_ACL07_DLY
404c MBIST_TCM08_ACL1
4050 MBIST_ACL08_DLY
4054 MBIST_TCM09_ACL1
4058 MBIST_ACL09_DLY
405c MBIST_TCM10_ACL1
4060 MBIST_ACL10_DLY
4064 MBIST_TCM11_ACL1
4068 MBIST_ACL11_DLY
406c MBIST_TCM12_ACL1
4070 MBIST_ACL12_DLY
4074 MBIST_TCM13_ACL1
4078 MBIST_ACL13_DLY
407c MBIST_TCM14_ACL1
4080 MBIST_ACL14_DLY
4084 MBIST_TCM15_ACL1
4088 MBIST_ACL15_DLY
408c MBIST_LOG00_ACL2
4090 MBIST_LOG01_ACL2
4094 MBIST_LOG02_ACL2
4098 MBIST_LOG03_ACL2
409c MBIST_ACT00_ACL3
40a0 MBIST_ACT01_ACL3
40a4 MBIST_ACT02_ACL3
40a8 MBIST_ACT03_ACL3
40ac MBIST_ACT04_ACL3
40b0 MBIST_ACT05_ACL3
40b4 MBIST_ACT06_ACL3
40b8 MBIST_ACT07_ACL3
40bc MEM_ACL_INIT
TABLE_ACCESS
40c0 TBL_ACCESS_CTRL_1
40c4 TBL_ACCESS_DATA_1
METER_MARKER
411c METER_GLB_CTRL
4120 METER_LB_EXCEED_STS
4160 METER_LB_GLB_EXCEED_STS
4164 METER_CNTR_CTRL
4168 METER_GREEN_CNTR_STS
416c METER_YELLOW_CNTR_STS
4170 METER_RED_CNTR_STS
4174 METER_TOTAL_CNTR_STS
4178 METER_BYTE_TB_CTRL
417c METER_PKT_TB_CTRL
PIE
4180 PIE_BLK_LOOKUP_CTRL
4184 PIE_BLK_PHASE_CTRL
4194 PIE_BLK_GROUP_CTRL
4214 PIE_BLK_TMPLTE_CTRL
4294 PIE_TMPLTE_CTRL
42d0 PIE_MV_CTRL
42d4 PIE_MV_LEN_CTRL
42d8 PIE_CLR_CTRL
42dc PIE_CTRL
42e0 PIE_TAG_CTRL
42e4 PIE_RULE_HIT_INDICATION
44e4 PIE_GLB_HIT_INDICATION
44f4 PIE_MISC
ACL
44f8 ACL_PORT_LOOKUP_CTRL
RANGE_CHECK_PKT_LEN_L4PORT
45d8 RNG_CHK_CTRL
4658 RNG_CHK_IP_CTRL
4678 RNG_CHK_IP_RNG
REMOTE_ACCESS
46b8 RMT_TBL_ACCESS_SET_1_CTRL
46bc RMT_TBL_ACCESS_SET_1_DATA
4714 RMT_TBL_ACCESS_SET_1_CFG
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
4718 ACL_DBG_TRI
471c ACL_DBG_CTL
4720 ACL_DBG_MASK
4724 ACL_DBG_CMP
4728 ACL_DBG_VAL
472c ACL_DBG_DATA
ECO
474c ACL_RSVD
BIST_BISR
4800 MBIST_ENCAP_START
4804 MBIST_ENCAP_RESUME
4808 MBIST_ENCAP_GLB
480c MBIST_ENCAP01
4810 MBIST_ENCAP02
4814 MBIST_ENCAP03
4818 MBIST_ENCAP04
481c MBIST_ENCAP05
4820 MBIST_ENCAP06
4824 MBIST_ENCAP07
4828 MBIST_ENCAP08
482c MBIST_ENCAP09
4830 MBIST_ENCAP10
4834 MBIST_ENCAP11
4838 MBIST_ENCAP12
483c MBIST_ENCAP13
4840 MBISR_ENCAP01
4844 MBISR_ENCAP02
4848 MBISR_ENCAP_OUT
484c MBIST_ENCAP_TCAM
4850 MBIST_ENCAP_DLY
4854 MEM_ENCAP_INIT
NIC_DMA
4858 DMA_IF_PKT_CTRL
MAC_CONTROL
485c MAC_L2_CPU_CRC
802_1Q_VLAN_QINQ
4860 VLAN_PORT_TAG_CTRL
VLAN_RANGE_CHECK
4944 VLAN_EGR_VID_RNG_CHK_SET_0
49c4 VLAN_EGR_VID_RNG_CHK_SET_1
4a44 VLAN_EGR_VID_RNG_CHK_SET_2
4ac4 VLAN_EGR_VID_RNG_CHK_SET_3
VLAN_TRANSLATION
4b44 VLAN_PORT_EVC_CTRL
4c28 VLAN_EVC_ENTRY_INDICATION
4ca8 VLAN_EVC_ENTRY_INDICATION_AGGR
LINK_AGGREGATION
4cac LOCAL_PORT_TRK_MAP
EGRESS_BANDWIDTH_CONTROL
4d8c EGBW_ENCAP_CTRL
REMARKING
4d90 RMK_CTRL
4d94 RMK_PORT_CTRL
4e78 RMK_INTPRI2IPRI_CTRL
4e7c RMK_IPRI2IPRI_CTRL
4e80 RMK_OPRI2IPRI_CTRL
4e84 RMK_DSCP2IPRI_CTRL
4ea0 RMK_INTPRI2OPRI_CTRL
4ea4 RMK_IPRI2OPRI_CTRL
4ea8 RMK_OPRI2OPRI_CTRL
4eac RMK_DSCP2OPRI_CTRL
4ec8 RMK_INTPRI2DEI_CTRL
4ecc RMK_DP2DEI_CTRL
4ed0 RMK_INTPRI2DSCP_CTRL
4ed8 RMK_IPRI2DSCP_CTRL
4ee0 RMK_OPRI2DSCP_CTRL
4ee8 RMK_DSCP2DSCP_CTRL
4f1c RMK_DPINTPRI2DSCP_CTRL
802_1QAV
4f34 AVB_PORT_CLASS_A_EN_MAC
4f3c AVB_PORT_CLASS_B_EN_MAC
4f44 AVB_CTRL_MAC
IP_TUNNEL
4f48 TUNNEL_IP_IDENTIFICATION
MPLS_VPLS
4f4c MPLS_ENCAP_CTRL
4f50 MPLS_DPINTPRI2TC_CTRL
PIE
4f5c PIE_ENCAP_CTRL
CFM
4f60 ETH_DM_TX_DLY
OPENFLOW
4f64 OF_EGR_TBL_MIS
4f68 OF_EGR_TBL_CNTR
4f70 OF_EXCPT_CTRL
L2_TUNNEL
4f74 CAPWAP_PASSENGER_QOS
4f94 CAPWAP_TID_RMK
REMOTE_ACCESS
4fa0 RMT_TBL_ACCESS_SET_3_CTRL
4fa4 RMT_TBL_ACCESS_SET_3_DATA
4fc8 RMT_TBL_ACCESS_SET_3_CFG
ECO
4fcc PKT_ENCAP_MISC_CTRL
4fd0 PKT_ENCAP_RSVD1
4fd4 PKT_ENCAP_RSVD2
4fd8 STAT_PRVTE_DBG_ENCAP_CNTR
BIST_BISR
5000 MBIST_IGR_START
5004 MBIST_IGR_RESUME
5008 MBIST_IGR_GLB
500c MBISR_IGR_RESULT_01
5010 MBISR_IGR_RESULT_23
5014 MBIST_IGR01_0
5018 MBIST_IGR01_1
501c MBIST_IGR02
5020 MBIST_IGR03
5024 MBIST_IGR04
5028 MBIST_IGR05
502c MBIST_IGR06_0
5030 MBIST_IGR06_1
5034 MBIST_IGR06_2
5038 MBIST_IGR06_3
503c MBIST_IGR06_4
5040 MBIST_IGR07
5044 MEM_IGR_INIT
FLOWCONTROL_BACKPRESSURE
5048 FC_CTRL
504c FC_PORT_ACT_CTRL
5130 FC_GLB_SYS_UTIL_THR
5134 FC_GLB_DROP_THR
5138 FC_GLB_HI_THR
513c FC_GLB_LO_THR
5140 FC_GLB_FCOFF_HI_THR
5144 FC_GLB_FCOFF_LO_THR
5148 FC_JUMBO_HI_THR
514c FC_JUMBO_LO_THR
5150 FC_JUMBO_FCOFF_HI_THR
5154 FC_JUMBO_FCOFF_LO_THR
5158 FC_JUMBO_THR_ADJUST
515c FC_PORT_HI_THR
516c FC_PORT_LO_THR
517c FC_PORT_FCOFF_HI_THR
518c FC_PORT_FCOFF_LO_THR
519c FC_PORT_GUAR_THR
51ac FC_PORT_THR_SET_SEL
51bc FC_GLB_PAGE_CNT
51c0 FC_PB_PAGE_CNT
51c4 FC_PORT_PAGE_CNT
52a8 FC_DUMMY_PORT_THR_SET_SEL
52ac FC_DUMMY_PORT_IGR_PAGE_CNT
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
52b4 IGR_DBG_TRI
52b8 IGR_DBG_CTL
52bc IGR_DBG_MASK
52c0 IGR_DBG_CMP
52c4 IGR_DBG_VAL
52c8 IGR_DBG_DATA
AUTO_RECOVERY
52e8 RX_PORT_DSC_STC
52f0 RX_PORT_DSC_ERR
52f8 SW_Q_RST_SYS_THR
52fc SW_Q_RST_P_THR
53e0 LINK_LIST_STS
53e4 LINK_LIST_ERR
53e8 SYS_DSC_CTRL
53ec LINK_LIST_CTRL_0
53f0 LINK_LIST_CTRL_1
ECO
53f4 INGR_CTRL_RSVD
BIST_BISR
5400 MBIST_PG00_RX_MAC01
5404 MBIST_PG00_RX_MAC05
5408 MBIST_PG00_RX_MAC_DMY
540c MBIST_PG00_TX_MAC01
5410 MBIST_PG00_TX_MAC_DMY
5414 MBIST_PG01_RX_MAC01
5418 MBIST_PG01_RX_MAC05
541c MBIST_PG01_RX_MAC_DMY
5420 MBIST_PG01_TX_MAC01
5424 MBIST_PG01_TX_MAC_DMY
5428 MBIST_PG02_RX_MAC01
542c MBIST_PG02_RX_MAC05
5430 MBIST_PG02_RX_MAC_DMY
5434 MBIST_PG02_TX_MAC01
5438 MBIST_PG02_TX_MAC_DMY
543c MBIST_PG03_RX_MAC01
5440 MBIST_PG03_RX_MAC05
5444 MBIST_PG03_RX_MAC_DMY
5448 MBIST_PG03_TX_MAC01
544c MBIST_PG03_TX_MAC_DMY
5450 MBIST_PG04_RX_MAC01
5454 MBIST_PG04_RX_MAC05
5458 MBIST_PG04_RX_MAC_DMY
545c MBIST_PG04_TX_MAC01
5460 MBIST_PG04_TX_MAC_DMY
5464 MBIST_PG05_RX_MAC01
5468 MBIST_PG05_RX_MAC05
546c MBIST_PG05_RX_MAC_DMY
5470 MBIST_PG05_TX_MAC01
5474 MBIST_PG05_TX_MAC_DMY
5478 MBIST_PG06_RX_MAC08
547c MBIST_PG06_RX_MAC04
5480 MBIST_PG06_RX_MAC06
5484 MBIST_PG06_RX_MAC06_DMY0
5488 MBIST_PG06_RX_MAC06_DMY1
548c MBIST_PG06_TX_MAC08
5490 MBIST_PG06_TX_MAC02
5494 MBIST_PG07_RX_MAC08
5498 MBIST_PG07_RX_MAC04
549c MBIST_PG07_RX_MAC06
54a0 MBIST_PG07_RX_MAC06_DMY0
54a4 MBIST_PG07_RX_MAC06_DMY1
54a8 MBIST_PG07_TX_MAC08
54ac MBIST_PG07_TX_MAC02
54b0 MBIST_PG08_RX_MAC10
54b4 MBIST_PG08_RX_MAC07
54b8 MBIST_PG08_RX_MAC11
54bc MBIST_PG08_RX_MAC_DMY
54c0 MBIST_PG08_TX_MAC10
54c4 MBIST_PG08_TX_MAC12
54c8 MBIST_PG09_RX_MAC10
54cc MBIST_PG09_RX_MAC07
54d0 MBIST_PG09_RX_MAC11
54d4 MBIST_PG09_RX_MAC_DMY
54d8 MBIST_PG09_TX_MAC10
54dc MBIST_PG09_TX_MAC12
54e0 MBIST_PG10_RX_MAC10
54e4 MBIST_PG10_RX_MAC07
54e8 MBIST_PG10_RX_MAC11
54ec MBIST_PG10_RX_MAC_DMY
54f0 MBIST_PG10_TX_MAC10
54f4 MBIST_PG10_TX_MAC12
54f8 MBIST_PG11_RX_MAC10
54fc MBIST_PG11_RX_MAC07
5500 MBIST_PG11_RX_MAC11
5504 MBIST_PG11_RX_MAC_DMY
5508 MBIST_PG11_TX_MAC10
550c MBIST_PG11_TX_MAC12
5510 MBIST_PG12_RX_MAC03
5514 MBIST_PG12_RX_MAC09
5518 MBIST_PG12_RX_MAC07
551c MBIST_PG12_RX_MAC_DMY0
5520 MBIST_PG12_RX_MAC_DMY1
5524 MBIST_PG12_TX_MAC02
5528 MBIST_PG12_PG_MAC13
552c MBIST_PG12_PG_MAC14
5530 MBIST_MAC_RESET_00
5534 MBIST_MAC_RESET_01
5538 MBIST_MAC_RESET_02
553c MBIST_MAC_RESUME_00
5540 MBIST_MAC_RESUME_01
5544 MBIST_MAC_RESUME_02
MAC_CONTROL
5548 MAC_L2_GLOBAL_CTRL1
554c MAC_L2_PADDING_SEL
5550 MAC_GLB_CTRL
5554 MAC_L2_PORT_MAX_LEN_CTRL
5634 MAC_DBG_SEL_CTRL
PHY_SERDES
5638 SERDES_INDRT_ACCESS_CTRL

SerDeS Indirect Access Control Register

563c SERDES_INDRT_DATA_CTRL

SerDeS indirect access data register

5640 SERDES_BC_CTRL

SerDeS Broadcast Controller

POWER_SAVING
5644 EEE_PORT_TX_EN
564c EEE_PORT_RX_EN
5654 EEE_MISC_CTRL0
5658 EEE_TX_MINIFG_CTRL0
565c EEE_TX_MINIFG_CTRL1
5660 EEE_TX_MINIFG_CTRL2
5664 EEE_WAIT_RX_INACTIVE_CTRL0
5668 EEE_WAIT_RX_INACTIVE_CTRL1
566c EEE_MULTIWAKE_CTRL
5670 EEE_TX_TIMER_100M_CTRL
5674 EEE_TX_TIMER_GELITE_CTRL
5678 EEE_TX_TIMER_GIGA_CTRL
567c EEE_TX_TIMER_2P5G_CTRL
5680 EEE_TX_TIMER_5G_CTRL
5684 EEE_TX_TIMER_10G_CTRL
5688 EEE_PORT_TX_STS
5690 EEE_PORT_RX_STS
5698 EEEP_PORT_TX_EN_CTRL
56a0 EEEP_PORT_RX_EN_CTRL
56a8 EEEP_PORT_1000M_EN_CTRL
56b0 EEEP_PORT_500M_EN_CTRL
56b8 EEEP_PORT_100M_EN_CTRL
56c0 EEEP_SLV_EN_CTRL
56c4 EEEP_TIMER_UNIT_CTRL
56c8 EEEP_TX_WAKE_TIMER_CTRL
56cc EEEP_TX_IDLE_TIMER_CTRL
56d0 EEEP_TX_RATE_100M_CTRL
56d4 EEEP_TX_RATE_500M_CTRL
56d8 EEEP_TX_RATE_GIGA_CTRL
56dc EEEP_RX_SLEEP_STEP_CTRL
56e0 EEEP_RX_IDLE_TIMER_CTRL
56e4 EEEP_RX_TIMER_100M_CTRL
56e8 EEEP_RX_TIMER_500M_CTRL0
56ec EEEP_RX_TIMER_500M_CTRL1
56f0 EEEP_RX_TIMER_GIGA_CTRL0
56f4 EEEP_RX_TIMER_GIGA_CTRL1
56f8 EEEP_RX_RATE_100M_CTRL
56fc EEEP_RX_RATE_500M_CTRL
5700 EEEP_RX_RATE_GIGA_CTRL
L2_ENTRY_NOTIFICATION
5704 L2_NTFY_PKT_CTRL
5708 L2_NTFY_PKT_TIMEOUT
570c L2_NTFY_PKT_MAC
571c L2_NTFY_PKT_ITAG
MIB_CONTROL
5720 STAT_CTRL
5724 STAT_CNT_SET1_CTRL
5728 STAT_CNT_SET0_CTRL
PORT_EXTENSION
572c PE_ETAG_MAC_CTRL
ECO
5730 MAC_CTRL_RSVD
5738 EEE_TX_TIMER_2P5G_5G_LITE_CTRL
MAC_CONTROL
6000 MAC_L2_PORT_CTRL
6004 MAC_PORT_CTRL
6008 HALF_CHG_CTRL
802_1Q_VLAN_QINQ
600c VLAN_PORT_OTAG_TPID_CMP_MSK
6010 VLAN_PORT_ITAG_TPID_CMP_MSK
CONGESTION_AVOIDANCE
6014 SC_PORT_TIMER
PORT_EXTENSION
6018 PE_PORT_ETAG_MAC_CTRL
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
601c PER_PORT_MAC_DEBUG0
6020 PER_PORT_MAC_DEBUG1
6024 PER_PORT_MAC_DEBUG2
ECO
6028 PER_PORT_MAC_RSVD
BIST_BISR
7e00 MBIST_MIB_START
7e04 MBIST_MIB_RESUME
7e08 MBIST_MIB_GLB
7e0c MBIST_MIB00
7e10 MBIST_MIB01
7e14 MBIST_MIB02
7e18 MEM_MIB_INIT
TABLE_ACCESS
7e1c TBL_ACCESS_CTRL_5
7e20 TBL_ACCESS_DATA_5
MIB_CONTROL
7ef4 STAT_RST
7ef8 STAT_PORT_RST
7efc CFG_DMY_MIB_0
7f00 CFG_DMY_MIB_1
7f04 CFG_DMY_MIB_2
7f08 CFG_DMY_MIB_3
7f0c CFG_DMY_MIB_4
7f10 STAT_SRAM_CTRL
MIB_COUNTER
7f14 STAT_BRIDGE_DOT1DTPLEARNEDENTRYDISCARDS
REMOTE_ACCESS
7f18 RMT_TBL_ACCESS_SET_5_CTRL
7f1c RMT_TBL_ACCESS_SET_5_DATA
7ff0 RMT_TBL_ACCESS_SET_5_CFG
ECO
7ff4 MIB_CTRL_RSVD
SPANNING_TREE
8000 ST_CTRL
802_1QAV
8004 AVB_CTRL
PIE
8008 PIE_MISC2
ECO
800c ALE_GLB_MISC_CTRL
DEBUGGING_ALE_LOOPBACK_DROP_MECHANISM_FC_AND_QM
8080 ALE_DBG_TRI
8084 ALE_DBG_CTL
8088 ALE_DBG_MASK
808c ALE_DBG_CMP
8090 ALE_DBG_VAL
8094 ALE_DBG_DATA
ECO
80b4 ALE_DEBUG_RSVD
PORT_ISOLATION
8100 PORT_ISO_RESTRICT_ROUTE_CTRL
ECO
8104 ALE_PISO_RSVD
FLOWCONTROL_BACKPRESSURE
8180 FC_REPCT_FCOFF_THR
8184 FC_ALE_NON_REPCT_Q_PAGE_CNT
8188 FC_ALE_REPCT_Q_PAGE_CNT
818c FC_REPCT_FCON_PAGE_CNT
8190 FC_REPCT_FCOFF_PAGE_CNT
8194 FC_REPCT_FCOFF_DROP_CNT
ECO
8198 ALE_LUEN_RSVD
HW_MISC
8200 TM1_CTRL0
8204 TM1_CTRL1
8208 TM1_CTRL2
820c TM1_CTRL3
8210 TM1_CTRL4
8214 TM1_CTRL5
8218 TM1_CTRL6
821c TM1_CTRL7
8220 TM1_RESULT0
8224 TM1_RESULT1
8228 TM1_RESULT2
822c TM1_RESULT3
ECO
8230 ALE_TM_RSVD
BIST_BISR
8280 MBISR_ALE_START
8284 MBISR_ALE_RESUME
8288 MBISR_ALE01
828c MBISR_ALE01_OUT
8290 MBISR_ALE02
8294 MBISR_ALE02_OUT
8298 MBISR_ALE03
829c MBISR_ALE03_OUT
82a0 MBISR_ALE04
82a4 MBISR_ALE04_OUT
82a8 MBISR_ALE05
82ac MBISR_ALE05_OUT
82b0 MBISR_ALE06
82b4 MBISR_ALE06_OUT
82b8 MBISR_ALE07
82bc MBISR_ALE07_OUT
82c0 MBISR_ALE08
82c4 MBISR_ALE08_OUT_0
82c8 MBISR_ALE08_OUT_1
82cc MBISR_ALE09
82d0 MBISR_ALE09_OUT
82d4 MBISR_ALE10
82d8 MBISR_ALE10_OUT
82dc MBISR_ALE11
82e0 MBISR_ALE11_OUT
82e4 MEM_ALE_INIT_2
ECO
82e8 ALE_BISR_RSVD
BIST_BISR
8300 MBIST_ALE_START_0
8304 MBIST_ALE_START_1
8308 MBIST_ALE_RESUME_0
830c MBIST_ALE_RESUME_1
8310 MBIST_ALE_GLB
8314 MBIST_ALE01
8318 MBIST_ALE02
831c MBIST_ALE03
8320 MBIST_ALE04
8324 MBIST_ALE05
8328 MBIST_ALE06
832c MBIST_ALE07
8330 MBIST_ALE08
8334 MBIST_ALE09
8338 MBIST_ALE10
833c MBIST_ALE011
8340 MBIST_ALE012
8344 MBIST_ALE13
8348 MBIST_ALE14
834c MBIST_ALE15
8350 MBIST_ALE16
8354 MBIST_ALE17
8358 MBIST_ALE17_DLY
835c MBIST_ALE18
8360 MBIST_ALE18_DLY
8364 MBIST_ALE19
8368 MBIST_ALE19_DLY
836c MBIST_ALE20
8370 MBIST_ALE20_DLY
8374 MBIST_ALE21
8378 MBIST_ALE21_DLY
837c MBIST_ALE22
8380 MBIST_ALE22_DLY
8384 MBIST_ALE23
8388 MBIST_ALE23_DLY
838c MBIST_ALE24
8390 MBIST_ALE24_DLY
8394 MBIST_ALE25
8398 MBIST_ALE25_DLY
839c MBIST_ALE26
83a0 MBIST_ALE26_DLY
83a4 MBIST_ALE27
83a8 MBIST_ALE27_DLY
83ac MBIST_ALE28
83b0 MBIST_ALE28_DLY
83b4 MBIST_ALE29
83b8 MBIST_ALE29_DLY
83bc MBIST_ALE30
83c0 MBIST_ALE30_DLY
83c4 MBIST_ALE31
83c8 MBIST_ALE31_DLY
83cc MBIST_ALE32
83d0 MBIST_ALE32_DLY
83d4 MBIST_ALE33
83d8 MBIST_ALE34
83dc MBIST_ALE35
83e0 MBIST_ALE36
83e4 MBIST_ALE37
83e8 MBIST_ALE38
83ec MBIST_ALE39
83f0 MEM_ALE_INIT_0
83f4 MEM_ALE_INIT_1
ECO
83f8 ALE_BIST_RSVD
SFLOW
8400 SFLOW_CTRL
8404 SFLOW_PORT_RATE_CTRL
ECO
84e4 ALE_SFLOW_CTL_RSVD
TABLE_ACCESS
8500 TBL_ACCESS_CTRL_0
8504 TBL_ACCESS_L2_METHOD_CTRL
8508 TBL_ACCESS_DATA_0
8528 TBL_ACCESS_CTRL_2

Access control for table group 2

852c TBL_ACCESS_DATA_2
8544 FLEX_TBL_CTRL
REMOTE_ACCESS
8548 RMT_TBL_ACCESS_SET_0_CTRL
854c RMT_TBL_ACCESS_SET_0_DATA
856c RMT_TBL_ACCESS_SET_0_CFG
8570 RMT_TBL_ACCESS_SET_0_L2_READ_MTHD_CTRL
8574 RMT_TBL_ACCESS_SET_2_CTRL
8578 RMT_TBL_ACCESS_SET_2_DATA
8590 RMT_TBL_ACCESS_SET_2_CFG
ECO
8594 ALE_TABLE_RSVD
CONGESTION_AVOIDANCE
8600 SWRED_DROP_CNTR_PIDX
8604 SWRED_DROP_CNTR_CIDX
8608 SWRED_DROP_CNTR
8610 SWRED_DROP_CNTR_RST
ECO
8614 ALE_MIB_RSVD
RMA
8800 RMA_CTRL_0
8804 RMA_CTRL_1
8808 RMA_CTRL_2
880c RMA_MIRROR_CTRL
8810 RMA_SMAC_LRN_CTRL
8818 RMA_MGN_LRN_CTRL
881c RMA_PORT_BPDU_CTRL
8834 RMA_PORT_PTP_CTRL
8918 RMA_PORT_LLDP_CTRL
8930 RMA_PORT_EAPOL_CTRL
8948 RMA_FLD_PMSK
8950 RMA_BPDU_FLD_PMSK
8958 RMA_EAPOL_FLD_PMSK
8960 RMA_LLDP_FLD_PMSK
8968 RMA_USR_DEF_FLD_PMSK
8970 RMA_USR_DEF_CTRL
ECO
89c0 ALE_RMA_RSVD
PORT_ISOLATION
8a00 PORT_ISO_VB_ISO_PMSK_CTRL
8b80 PORT_ISO_VB_EGR_CTRL
ECO
8b88 ALE_VLAN_ISO_CTL_RSVD
APPLICATION_TRAP
8c00 TRAP_CTRL
8c04 TRAP_ARP_GRAT_PORT_ACT
802_1QAV
8c14 AVB_PORT_CLASS_A_EN
8c1c AVB_PORT_CLASS_B_EN
ACL
8c24 ACL_CTRL
ATTACK_PREVENTION
8c28 ATK_PRVNT_PORT_EN
8c30 ATK_PRVNT_CTRL
8c34 ATK_PRVNT_ACT
8c38 ATK_PRVNT_IPV6_CTRL
8c3c ATK_PRVNT_ICMP_CTRL
8c40 ATK_PRVNT_TCP_CTRL
8c44 ATK_PRVNT_SMURF_CTRL
8c48 ATK_PRVNT_STS
8c4c ATK_PRVNT_ARP_INVLD_PORT_ACT
IP_MAC_BIDING
8c5c SEC_IP_MAC_BIND_CTRL
8c60 SEC_PORT_IP_MAC_BIND_CTRL
OAM
8d40 OAM_CTRL
8d44 OAM_PORT_ACT_CTRL
ECO
8e24 ALE_PRE_MISC_RSVD
INGRESS_PRIORITY_DECISION
9000 PRI_SEL_CTRL
9004 PRI_SEL_PORT_CTRL
900c PRI_SEL_REMAP_PORT
9024 PRI_SEL_REMAP_IPRI_CFI0
9028 PRI_SEL_REMAP_IPRI_CFI1
902c PRI_SEL_REMAP_OPRI_DEI0
9030 PRI_SEL_REMAP_OPRI_DEI1
9034 PRI_SEL_REMAP_DSCP
9050 PRI_SEL_REMAP_11E
9058 PRI_SEL_REMAP_MPLS
905c PRI_SEL_REMAP_1BR
9064 PRI_SEL_PORT_TBL_IDX_CTRL
9074 PRI_SEL_TBL_CTRL
9094 DP_SEL_REMAP_ITAG_CFI0
9098 DP_SEL_REMAP_ITAG_CFI1
909c DP_SEL_REMAP_OTAG_DEI0
90a0 DP_SEL_REMAP_OTAG_DEI1
90a4 DP_SEL_REMAP_DSCP
90b4 DP_SEL_REMAP_MPLS
90b8 DP_SEL_PORT_TBL_CTRL
ECO
919c ALE_INGPRI_CTL_RSVD
802_1Q_VLAN_QINQ
9400 VLAN_PORT_AFT
94e4 VLAN_CTRL
94e8 VLAN_PORT_IGR_CTRL
95cc VLAN_PORT_FWD_CTRL
96b0 VLAN_APP_PKT_CTRL
96b4 VLAN_PORT_IGR_FLTR
96c4 VLAN_PORT_EGR_FLTR
VLAN_TRANSLATION
96cc VLAN_L2TBL_CNVT_CTRL
96d0 VLAN_PORT_L2TBL_CNVT_CTRL
97b4 VLAN_TRUNK_L2TBL_CNVT_CTRL_3
97c4 VLAN_TRUNK_L2TBL_CNVT_CTRL_2
97d4 VLAN_TRUNK_L2TBL_CNVT_CTRL_1
97e4 VLAN_TRUNK_L2TBL_CNVT_CTRL_0
ECO
97f4 ALE_VLAN_CFG_RSVD
VLAN_PROFILE
9800 VLAN_PROFILE_SET
ECO
99c0 ALE_VLAN_PROFILE_RSVD
VLAN_RANGE_CHECK
9c00 VLAN_IGR_VID_RNG_CHK_SET_0
9c80 VLAN_IGR_VID_RNG_CHK_SET_1
9d00 VLAN_IGR_VID_RNG_CHK_SET_2
9d80 VLAN_IGR_VID_RNG_CHK_SET_3
VLAN_TRANSLATION
9e00 VLAN_IVC_BLK_CTRL
9e04 VLAN_PORT_IVC_CTRL
9ee8 VLAN_IVC_ENTRY_INDICATION
9fe8 VLAN_IVC_ENTRY_INDICATION_AGGR
ECO
9ff0 ALE_IVC_MISC_CTRL
STORM_CONTROL
a000 STORM_LB_PROTO_CTRL
a004 STORM_PORT_PROTO_DHCP_CTRL
a0e8 STORM_PORT_PROTO_DHCP_LB_RST
a0f0 STORM_PORT_PROTO_DHCP_EXCEED_FLAG
a0f8 STORM_PORT_PROTO_BPDU_CTRL
a1dc STORM_PORT_PROTO_BPDU_LB_RST
a1e4 STORM_PORT_PROTO_BPDU_EXCEED_FLAG
a1ec STORM_PORT_PROTO_IGMP_CTRL
a2d0 STORM_PORT_PROTO_IGMP_LB_RST
a2d8 STORM_PORT_PROTO_IGMP_EXCEED_FLAG
a2e0 STORM_PORT_PROTO_ARP_CTRL
a3c4 STORM_PORT_PROTO_ARP_LB_RST
a3cc STORM_PORT_PROTO_ARP_EXCEED_FLAG
ECO
a3d4 ALE_PSTORM_RSVD
CFM
a400 CFM_RX_CTRL
a404 CFM_RX_CCM_CTRL
a408 CFM_RX_LB_CTRL
a40c CFM_RX_LT_CTRL
a410 CCM_RX_LIFETIME_CTRL
a41c CCM_RX_INST_CTRL
a43c CCM_RX_INST_CNT
a45c ETH_DM_PORT_EN
a464 ETH_DM_RX_CTRL
a468 ETH_DM_RX_TIME
ECO
a668 ALE_CFM_CTL_RSVD
FLOWCONTROL_BACKPRESSURE
a800 FC_PORT_EGR_DROP_CTRL
a8e4 FC_HOL_PRVNT_CTRL
a8e8 FC_PORT_Q_EGR_FORCE_DROP_CTRL_SET0
a9b8 FC_PORT_Q_EGR_FORCE_DROP_CTRL_SET1
a9c8 FC_CPU_Q_EGR_FORCE_DROP_CTRL
a9cc FC_LB_PORT_CTRL
SCHEDULING_QUEUE_MANAGEMENT
a9d0 QM_INTPRI2QID_CTRL
a9d4 QM_CPUQID2QID_CTRL
a9e4 QM_CPUQID2XGSQID_CTRL
a9f4 QM_RSN2CPUQID_CTRL_0
a9f8 QM_RSN2CPUQID_CTRL_1
a9fc QM_RSN2CPUQID_CTRL_2
aa00 QM_RSN2CPUQID_CTRL_3
aa04 QM_RSN2CPUQID_CTRL_4
aa08 QM_RSN2CPUQID_CTRL_5
aa0c QM_RSN2CPUQID_CTRL_6
aa10 QM_RSN2CPUQID_CTRL_7
aa14 QM_RSN2CPUQID_CTRL_8
aa18 QM_RSN2CPUQID_CTRL_9
aa1c QM_RSN2CPUQID_CTRL_10
aa20 QM_FLAG2CPUQID_CTRL_0
aa24 QM_FLAG2CPUQID_CTRL_1
aa28 QM_FLAG2CPUQID_CTRL_2
ECO
aa2c ALE_Q_CTRL_RSVD
PARSER_HSB
ac00 HSB_CTRL
ac04 HSB_DATA
ECO
acdc ALE_HSB_RSVD
HSM
ad00 HSM_DATA
ad74 HSM_FWD_DATA
ad84 HSM_POST_DATA
ECO
ad90 ALE_HSM_RSVD
MODIFIER_HSA
ae00 HSA_CTRL
ae04 HSA_DBG_CTRL
ae08 HSA_DATA
ECO
aea4 ALE_HSA_RSVD
MIRRORING
af00 MIR_CTRL
af10 MIR_SPM_CTRL
af30 MIR_DPM_CTRL
af50 MIR_SAMPLE_RATE_CTRL
af58 MIR_QID_CTRL
RSPAN
af5c MIR_RSPAN_RX_TAG_RM_CTRL
ECO
af60 ALE_MIRROR_CTL_RSVD
STORM_CONTROL
b000 STORM_CTRL
b004 STORM_LB_CTRL
b008 STORM_LB_PPS_CTRL
b00c STORM_PORT_CTRL
b014 STORM_PORT_UC_CTRL
b1dc STORM_PORT_UC_LB_RST
b1e4 STORM_PORT_UC_EXCEED_FLAG
b1ec STORM_PORT_MC_CTRL
b3b4 STORM_PORT_MC_LB_RST
b3bc STORM_PORT_MC_EXCEED_FLAG
b3c4 STORM_PORT_BC_CTRL
b58c STORM_PORT_BC_LB_RST
b594 STORM_PORT_BC_EXCEED_FLAG
ECO
b59c ALE_UNSTORM_RSVD
LINK_AGGREGATION
b800 TRK_ID_CTRL
b8d0 TRK_MBR_CTRL
ba70 TRK_HASH_CTRL
ba78 TRK_CTRL
ba7c TRK_SHFT_CTRL
ba80 TRK_LOCAL_TBL_REFRESH
ba84 TRK_LOCAL_TBL
be94 TRK_STK_CTRL
ECO
beb4 ALE_TRUNK_RSVD
IEEE802_1V_PROTOCOL_BASED_VLAN
c000 VLAN_PPB_VLAN_SET
c020 VLAN_PORT_PPB_VLAN_SET
ECO
c740 ALE_VLAN_PROTOCOL_RSVD
MAC_FORWARDING_CONTROL
c800 L2_CTRL
c804 L2_AGE_CTRL
c808 L2_PORT_AGE_CTRL
c810 L2_TRK_AGE_CTRL
c820 L2_PORT_SALRN
c830 L2_PORT_NEW_SA_FWD
c848 L2_PORT_DYN_MV_ACT
c860 L2_PORT_DYN_MV_LRN
c868 L2_PORT_STT_MV_ACT
c880 L2_PORT_STT_MV_LRN
c888 L2_TRK_STT_MV_ACT
c8bc L2_TRK_STT_MV_LRN
c8cc L2_GLB_STT_PORT_MV_ACT
c8d0 L2_GLB_STT_PORT_MV_LRN
c8d4 L2_PORT_MV_FORBID
c8dc L2_TRK_MV_FORBID
c8e0 L2_PORT_MV_FORBID_CTRL
c8e4 L2_PORT_SABLK_CTRL
c8ec L2_PORT_DABLK_CTRL
c8f4 L2_UNKN_UC_FLD_PMSK
c8fc L2_BC_FLD_PMSK
c904 L2_PORT_UC_LM_ACT
c91c L2_PORT_L2_MC_LM_ACT
c934 L2_PORT_IP4_MC_LM_ACT
c94c L2_PORT_IP6_MC_LM_ACT
c964 L2_LRN_CONSTRT_CTRL
c968 L2_LRN_CONSTRT_CNT
c96c L2_LRN_PORT_CONSTRT_CTRL
ca50 L2_LRN_PORT_CONSTRT_CNT
cb34 L2_LRN_TRK_CONSTRT_CTRL
cb9c L2_LRN_TRK_CONSTRT_CNT
cc04 L2_LRN_VLAN_CONSTRT_ENTRY
cd04 L2_LRN_VLAN_CONSTRT_CNT
cd84 L2_VLAN_CONSTRT_CTRL
cd88 L2_CONSTRT_PORT_CNT_DBG
cd90 L2_CONSTRT_TRK_CNT_DBG
cd94 L2_CONSTRT_SYS_CNT_DBG
cd98 L2_CONSTRT_VLAN_CNT_DBG
cd9c L2_TBL_FLUSH_CTRL
cda4 L2_SRC_P_FLTR
cdac L2_SA_ACT_REF
cdb4 L2_HASH_FULL_CNT
cdb8 L2_CAM_ENTRY_STS
L2_ENTRY_NOTIFICATION
cdc8 L2_NTFY_CTRL
cdcc L2_NTFY_BP_STS
L2_TUNNEL
cdd0 L2_TUNNEL_CTRL
PORT_EXTENSION
cdd4 PE_PORT_ETAG_IGR_CTRL
ceb4 PE_PORT_PCID_CTRL
ECO
cf98 ALE_L2_CTRL_RSVD
cf9c ALE_L2_CTRL_RSVD1
cfa0 ALE_L2_CTRL_RSVD2
OPENFLOW
d000 OF_PORT_CTRL
d008 OF_VLAN_EN
d208 OF_VLAN_AND_PORT_EN
d408 OF_ACT_CTRL
d40c OF_L2_FLOW_TBL_CTRL
d410 OF_L3_FLOW_TBL_CTRL
d414 OF_GRP_HASH_CTRL
d418 OF_IGR_TBL_MIS
d41c OF_IGR_TBL_CNTR
ECO
d43c ALE_OF_RSVD
DEBUG_COUNTER
d800 STAT_PRVTE_DBG_CNTR0
d804 STAT_PRVTE_DBG_CNTR1
d808 STAT_PRVTE_DBG_CNTR2
d80c STAT_PRVTE_DBG_CNTR3
d810 STAT_PRVTE_DBG_CNTR4
d814 STAT_PRVTE_DBG_CNTR5
d818 STAT_PRVTE_DBG_CNTR6
d81c STAT_PRVTE_DBG_CNTR7
d820 STAT_PRVTE_DBG_CNTR8
d824 STAT_PRVTE_DBG_CNTR9
d828 STAT_PRVTE_DBG_CNTR10
d82c STAT_PRVTE_DBG_CNTR11
d830 STAT_PRVTE_DBG_CNTR12
d834 STAT_PRVTE_DBG_CNTR13
d838 STAT_PRVTE_DBG_CNTR14
d83c STAT_PRVTE_DBG_CNTR15
d840 STAT_PRVTE_DBG_CNTR16
d844 STAT_PRVTE_DBG_CNTR17
d848 STAT_PRVTE_DBG_CNTR18
d84c STAT_PRVTE_DBG_CNTR19
d850 STAT_PRVTE_DBG_CNTR20
d854 STAT_PRVTE_DBG_CNTR21
d858 STAT_PRVTE_DBG_CNTR22
d85c STAT_PRVTE_DBG_CNTR23
d860 STAT_PRVTE_DBG_CNTR24
d864 STAT_PRVTE_DBG_CNTR25
d868 STAT_PRVTE_DBG_CNTR26
d86c STAT_PRVTE_DBG_CNTR27
d870 STAT_PRVTE_DBG_CNTR28
d874 STAT_PRVTE_DBG_CNTR29
d878 STAT_PRVTE_DBG_CNTR30
d87c STAT_PRVTE_DBG_CNTR31
d880 STAT_PRVTE_DBG_CNTR32
d884 STAT_PRVTE_DBG_CNTR33
d888 STAT_PRVTE_DBG_CNTR34
d88c STAT_PRVTE_DBG_CNTR35
d890 STAT_PRVTE_DBG_CNTR36
d894 STAT_PRVTE_DBG_CNTR37
d898 STAT_PRVTE_DBG_CNTR38
d89c STAT_PRVTE_DBG_CNTR39
d8a0 STAT_PRVTE_DBG_CNTR40
d8a4 STAT_PRVTE_DBG_CNTR41
d8a8 STAT_PRVTE_DBG_CNTR42
d8ac STAT_PRVTE_DBG_CNTR43
d8b0 STAT_PRVTE_DBG_CNTR44
d8b4 STAT_PRVTE_DBG_CNTR45
d8b8 STAT_PRVTE_DBG_CNTR46
d8bc STAT_PRVTE_DBG_CNTR47
d8c0 STAT_PRVTE_DBG_CNTR48
d8c4 STAT_PRVTE_DBG_CNTR49
d8c8 STAT_PRVTE_DBG_CNTR50
d8cc STAT_PRVTE_DBG_CNTR51
d8d0 STAT_PRVTE_DBG_CNTR52
d8d4 STAT_PRVTE_DBG_CNTR53
d8d8 STAT_PRVTE_DBG_CNTR54
d8dc STAT_PRVTE_DBG_CNTR55
d8e0 STAT_PRVTE_DBG_CNTR56
d8e4 STAT_PRVTE_DBG_CNTR57
d8e8 STAT_PRVTE_DBG_CNTR58
d8ec STAT_PRVTE_DBG_CNTR59
d8f0 STAT_PRVTE_DBG_CNTR60
d8f4 STAT_PRVTE_DBG_CNTR61
d8f8 STAT_PRVTE_DBG_CNTR62
d8fc STAT_PRVTE_DBG_CNTR63
d900 STAT_PRVTE_DBG_CNTR64
d904 STAT_PRVTE_DBG_CNTR65
d908 STAT_PRVTE_DBG_CNTR66
d90c STAT_PRVTE_DBG_CNTR67
d910 STAT_PRVTE_DBG_CNTR68
d914 STAT_PRVTE_DBG_CNTR69
d918 STAT_PRVTE_DBG_CNTR70
d91c STAT_PRVTE_DBG_CNTR71
d920 STAT_PRVTE_DBG_CNTR72
d924 STAT_PRVTE_DBG_CNTR73
d928 STAT_PRVTE_DBG_CNTR74
d92c STAT_PRVTE_DBG_CNTR75
d930 STAT_PRVTE_DBG_CNTR76
d934 STAT_PRVTE_DBG_CNTR77
d938 STAT_PRVTE_DBG_CNTR78
d93c STAT_PRVTE_DBG_CNTR79
d940 STAT_PRVTE_DBG_CNTR80
ECO
d944 ALE_DCNT_RSVD
INGRESS_BANDWIDTH_CONTROL
e000 IGBW_CTRL
e004 IGBW_LB_CTRL
e008 IGBW_PORT_CTRL
e1d0 IGBW_PORT_LB_RST
e1d8 IGBW_PORT_EXCEED_FLAG
e1e0 IGBW_PORT_FC_CTRL
e1e8 IGBW_Q_DROP_THR
e1f4 IGBW_PORT_Q_CTRL
e74c IGBW_PORT_Q_LB_RST
e830 IGBW_PORT_Q_LB_EXCEED_FLAG
e914 IGBW_PORT_SCHED
ebc0 IGBW_RATE_10M_CTRL
ebc4 IGBW_RATE_100M_CTRL
ebc8 IGBW_RATE_500M_CTRL
ebcc IGBW_RATE_1G_CTRL
ebd0 IGBW_RATE_1250M_CTRL
ebd4 IGBW_RATE_2500M_CTRL
ebd8 IGBW_RATE_5G_CTRL
ebdc IGBW_RATE_10G_CTRL
ebe0 IGBW_PAGE_CNT_CTRL
ebe4 IGBW_Q_PAGE_CNT
ebf0 IGBW_ADMIT_Q_PAGE_CNT
ebf4 IGBW_DROP_Q_PAGE_CNT
ebf8 IGBW_WFQ_LB_CTRL
ECO
ebfc ALE_IBW_CTL_RSVD
LAYER_3_ROUTING
f000 L3_IP_ROUTE_CTRL
f004 L3_HOST_TBL_CTRL
f008 L3_IPUC_ROUTE_CTRL
f00c L3_IP6UC_ROUTE_CTRL
f010 L3_IPMC_ROUTE_CTRL
f014 L3_IP6MC_ROUTE_CTRL
f018 L3_PORT_IP_ROUTE_CTRL
f0fc L3_PORT_IP6_ROUTE_CTRL
f1e0 L3_INTF_IP_MTU
f220 L3_INTF_IP6_MTU
f260 L3_ENTRY_MV_CTRL
f264 L3_ENTRY_MV_PARAM
f268 L3_ECMP_HASH_CTRL
f26c L3_MONT_CNTR_CTRL
f27c L3_MONT_CNTR_DATA
f29c L3_HW_LU_KEY_CTRL
f2a0 L3_HW_LU_KEY_SIP_CTRL
f2b0 L3_HW_LU_KEY_DIP_CTRL
f2c0 L3_HW_LU_CTRL
IP_TUNNEL
f2c4 TUNNEL_IP_ADDR_CHK_CTRL
f2c8 TUNNEL_ROUTE_CTRL
f2cc TUNNEL_6RD_DOMAIN
MPLS_VPLS
f2e4 MPLS_GLB_CTRL
ECO
f2e8 ALE_L3_MISC_CTRL
f2ec ALE_L3_CTRL_RSVD1
f2f0 ALE_L3_CTRL_RSVD2